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author | Thierry Reding <treding@nvidia.com> | 2013-11-15 14:58:05 +0100 |
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committer | Thierry Reding <treding@nvidia.com> | 2013-12-19 09:29:52 +0100 |
commit | e6fff4aaf99763da8a68b237e09cb8d47730f118 (patch) | |
tree | fa050b9b2fa9c620dd289f2ef4d96969b10a19ad /drivers/gpu/host1x/dev.c | |
parent | gpu: host1x: clk_round_rate() can return a zero upon error (diff) | |
download | linux-e6fff4aaf99763da8a68b237e09cb8d47730f118.tar.xz linux-e6fff4aaf99763da8a68b237e09cb8d47730f118.zip |
gpu: host1x: Add Tegra124 support
Tegra124 has 192 syncpoints whereas its predecessors had 32 syncpoints.
This required changes to the hardware register layout.
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/host1x/dev.c')
-rw-r--r-- | drivers/gpu/host1x/dev.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 646a333b069a..2529908d304b 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c @@ -34,6 +34,7 @@ #include "debug.h" #include "hw/host1x01.h" #include "hw/host1x02.h" +#include "hw/host1x04.h" void host1x_sync_writel(struct host1x *host1x, u32 v, u32 r) { @@ -77,7 +78,17 @@ static const struct host1x_info host1x02_info = { .sync_offset = 0x3000, }; +static const struct host1x_info host1x04_info = { + .nb_channels = 12, + .nb_pts = 192, + .nb_mlocks = 16, + .nb_bases = 64, + .init = host1x04_init, + .sync_offset = 0x2100, +}; + static struct of_device_id host1x_of_match[] = { + { .compatible = "nvidia,tegra124-host1x", .data = &host1x04_info, }, { .compatible = "nvidia,tegra114-host1x", .data = &host1x02_info, }, { .compatible = "nvidia,tegra30-host1x", .data = &host1x01_info, }, { .compatible = "nvidia,tegra20-host1x", .data = &host1x01_info, }, |