diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-07-28 23:50:30 +0200 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2011-07-29 01:51:09 +0200 |
| commit | cb0e093162d7b6589c2217a00e2abfef686b32d6 (patch) | |
| tree | 1319526a26322a0112b94f96ff25984986bbc6df /drivers/gpu | |
| parent | drm/i915: Flush other plane register writes (diff) | |
| download | linux-cb0e093162d7b6589c2217a00e2abfef686b32d6.tar.xz linux-cb0e093162d7b6589c2217a00e2abfef686b32d6.zip | |
drm/i915: fix CB tuning check for ILK+
CB tuning is needed to handle potential process variations that might
cause clock jitter for certain PLL settings. However, we were setting
it incorrectly since we were using the wrong M value as a check (M1 when
we needed to use the whole M value). Fix it up, making my HDMI
attached display a little prettier (used to have occasional dots crawl
across the display).
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8f7ed7304269..32c8c956d975 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4994,7 +4994,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, } else if (is_sdvo && is_tv) factor = 20; - if (clock.m1 < factor * clock.n) + if (clock.m < factor * clock.n) fp |= FP_CB_TUNE; dpll = 0; |