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authorRex Zhu <Rex.Zhu@amd.com>2017-05-04 05:07:02 +0200
committerAlex Deucher <alexander.deucher@amd.com>2017-05-06 00:13:28 +0200
commit327fce0c0d265b14be575bfe21a98c7c0dd932d8 (patch)
tree6f2b0b2c07ba69dcb83147c44d6fea7b8de42e6f /drivers/gpu
parentdrm/amd/powerplay: clean up code in vega10_smumgr.c (diff)
downloadlinux-327fce0c0d265b14be575bfe21a98c7c0dd932d8.tar.xz
linux-327fce0c0d265b14be575bfe21a98c7c0dd932d8.zip
drm/amd/powerplay: disable engine spread spectrum feature on Vega10.
Vega10 atomfirmware do not have ASIC_InternalSS_Info table so disable this feature by default in driver. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Ken Wang <Qingqing.wang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 8baa890579d8..e24e54c294bd 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -1535,7 +1535,11 @@ static int vega10_populate_single_gfx_level(struct pp_hwmgr *hwmgr,
current_gfxclk_level->FbMult =
cpu_to_le32(dividers.ulPll_fb_mult);
/* Spread FB Multiplier bit: bit 0:8 int, bit 31:16 frac */
- current_gfxclk_level->SsOn = dividers.ucPll_ss_enable;
+ if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
+ PHM_PlatformCaps_EngineSpreadSpectrumSupport))
+ current_gfxclk_level->SsOn = dividers.ucPll_ss_enable;
+ else
+ current_gfxclk_level->SsOn = 0;
current_gfxclk_level->SsFbMult =
cpu_to_le32(dividers.ulPll_ss_fbsmult);
current_gfxclk_level->SsSlewFrac =