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author | Tom O'Rourke <Tom.O'Rourke@intel.com> | 2014-11-19 23:21:55 +0100 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-20 13:03:33 +0100 |
commit | 6985b352183fc00df22a769892a24bc438db5357 (patch) | |
tree | 8a793bca88004a47561720ba558b2b7b4423c4d3 /drivers/gpu | |
parent | drm/i915: change initial rps frequency for gen8 (diff) | |
download | linux-6985b352183fc00df22a769892a24bc438db5357.tar.xz linux-6985b352183fc00df22a769892a24bc438db5357.zip |
drm/i915: Update ring freq for full gpu freq range
In __gen6_update_ring_freq, use the full range of
possible gpu frequencies from max_freq to min_freq.
The actual gpu frequency could be outside the range
from max_freq_softlimit to min_freq_softlimit due
to power/thermal constraints.
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 70e75477f8fc..f103ffffc599 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4915,9 +4915,9 @@ static void __gen6_update_ring_freq(struct drm_device *dev) * to use for memory access. We do this by specifying the IA frequency * the PCU should use as a reference to determine the ring frequency. */ - for (gpu_freq = dev_priv->rps.max_freq_softlimit; gpu_freq >= dev_priv->rps.min_freq_softlimit; + for (gpu_freq = dev_priv->rps.max_freq; gpu_freq >= dev_priv->rps.min_freq; gpu_freq--) { - int diff = dev_priv->rps.max_freq_softlimit - gpu_freq; + int diff = dev_priv->rps.max_freq - gpu_freq; unsigned int ia_freq = 0, ring_freq = 0; if (INTEL_INFO(dev)->gen >= 8) { |