diff options
| author | Tom O'Rourke <Tom.O'Rourke@intel.com> | 2014-11-19 23:21:54 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-20 13:03:32 +0100 |
| commit | c7f3153a61b543830d397cda8918ef2d6330c6c7 (patch) | |
| tree | 25f83afb60eb3f56153b7b121e727f6785823eac /drivers/gpu | |
| parent | drm/i915: Keep min freq above floor on HSW/BDW (diff) | |
| download | linux-c7f3153a61b543830d397cda8918ef2d6330c6c7.tar.xz linux-c7f3153a61b543830d397cda8918ef2d6330c6c7.zip | |
drm/i915: change initial rps frequency for gen8
In gen8_enable_rps, change the initial rps setting
to the min_freq_softlimit (same as gen6_enable_rps).
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6d0795d3b2e4..70e75477f8fc 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4766,7 +4766,8 @@ static void gen8_enable_rps(struct drm_device *dev) /* 6: Ring frequency + overclocking (our driver does this later */ - gen6_set_rps(dev, (I915_READ(GEN6_GT_PERF_STATUS) & 0xff00) >> 8); + dev_priv->rps.power = HIGH_POWER; /* force a reset */ + gen6_set_rps(dev_priv->dev, dev_priv->rps.min_freq_softlimit); gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL); } |