diff options
| author | Hamza Mahfooz <hamza.mahfooz@amd.com> | 2024-02-16 21:02:21 +0100 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2024-03-04 21:59:07 +0100 |
| commit | 1c1a92068d308ed56fac03af9c8149530cb6e973 (patch) | |
| tree | ad251d97ee5553cef030dfd79f70fa045d1cb870 /drivers/gpu | |
| parent | Revert "drm/amdgpu: remove vm sanity check from amdgpu_vm_make_compute" for R... (diff) | |
| download | linux-1c1a92068d308ed56fac03af9c8149530cb6e973.tar.xz linux-1c1a92068d308ed56fac03af9c8149530cb6e973.zip | |
drm/amd/display: add DCN351 version identifiers
Add DCN3.5.1 ASIC identifiers.
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/display/include/dal_asic_id.h | 2 |
2 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h index ff2a65e67bd4..7785908a6676 100644 --- a/drivers/gpu/drm/amd/display/dmub/dmub_srv.h +++ b/drivers/gpu/drm/amd/display/dmub/dmub_srv.h @@ -112,6 +112,7 @@ enum dmub_asic { DMUB_ASIC_DCN32, DMUB_ASIC_DCN321, DMUB_ASIC_DCN35, + DMUB_ASIC_DCN351, DMUB_ASIC_MAX, }; diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h index e317089cf6ee..c9ec46c6b4c6 100644 --- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h +++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h @@ -250,11 +250,13 @@ enum { #define GC_11_0_0_A0 0x1 #define GC_11_0_2_A0 0x10 #define GC_11_0_3_A0 0x20 +#define GC_11_0_4_A0 0xC0 #define GC_11_UNKNOWN 0xFF #define ASICREV_IS_GC_11_0_0(eChipRev) (eChipRev < GC_11_0_2_A0) #define ASICREV_IS_GC_11_0_2(eChipRev) (eChipRev >= GC_11_0_2_A0 && eChipRev < GC_11_0_3_A0) #define ASICREV_IS_GC_11_0_3(eChipRev) (eChipRev >= GC_11_0_3_A0 && eChipRev < GC_11_UNKNOWN) +#define ASICREV_IS_GC_11_0_4(eChipRev) (eChipRev >= GC_11_0_4_A0 && eChipRev < GC_11_UNKNOWN) /* * ASIC chip ID |