diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-08 06:40:39 +0100 |
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committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-08 18:10:10 +0100 |
commit | 40c499f93fdefa2c496f59d18483b417ea06448b (patch) | |
tree | 125c077372e48fb18e66cdcd1ad03bf8393bd298 /drivers/gpu | |
parent | drm/i915/bdw: Add BDW PCH check first (diff) | |
download | linux-40c499f93fdefa2c496f59d18483b417ea06448b.tar.xz linux-40c499f93fdefa2c496f59d18483b417ea06448b.zip |
drm/i915/bdw: Take render error interrupt out of the mask
The handling of the error interrupts isn't wired up at all. And it
hasn't been ever since ilk happened, so don't bother.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index e32c08af8e8a..b620337e6d67 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -2132,8 +2132,7 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev) if (INTEL_INFO(dev)->gen >= 8) { ring->irq_enable_mask = - (GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT) | - GT_RENDER_CS_MASTER_ERROR_INTERRUPT; + GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT; ring->irq_get = gen8_ring_get_irq; ring->irq_put = gen8_ring_put_irq; ring->dispatch_execbuffer = gen8_ring_dispatch_execbuffer; |