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authorAlex Deucher <alexdeucher@gmail.com>2011-01-07 01:12:37 +0100
committerDave Airlie <airlied@redhat.com>2011-01-07 05:11:15 +0100
commitc46cb4dabddeda851d0d5faee64484f3783053e3 (patch)
treeb124a46d1e1c647afac1ec697811d47160b913b2 /drivers/gpu
parentdrm/radeon/kms: add support for gen2 pcie link speeds (diff)
downloadlinux-c46cb4dabddeda851d0d5faee64484f3783053e3.tar.xz
linux-c46cb4dabddeda851d0d5faee64484f3783053e3.zip
drm/radeon/kms: set the MSB of the HDP slice size
Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 11344c76e216..b5bc7d038fd9 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1147,7 +1147,7 @@ static void evergreen_mc_program(struct radeon_device *rdev)
tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);
WREG32(MC_VM_FB_LOCATION, tmp);
WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8));
- WREG32(HDP_NONSURFACE_INFO, (2 << 7));
+ WREG32(HDP_NONSURFACE_INFO, (2 << 7) | (1 << 30));
WREG32(HDP_NONSURFACE_SIZE, 0x3FFFFFFF);
if (rdev->flags & RADEON_IS_AGP) {
WREG32(MC_VM_AGP_TOP, rdev->mc.gtt_end >> 16);