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authorXiaojie Yuan <xiaojie.yuan@amd.com>2019-05-16 13:51:12 +0200
committerAlex Deucher <alexander.deucher@amd.com>2019-08-02 17:30:40 +0200
commit7e17e58bdde26d1bb3588a8c1c546b9beed33405 (patch)
tree3824d90c84dfd06f03b07f7ea293a3c7d264b4cf /drivers/gpu
parentdrm/amdgpu: initialize cg/pg flags and external rev id for navi12 (diff)
downloadlinux-7e17e58bdde26d1bb3588a8c1c546b9beed33405.tar.xz
linux-7e17e58bdde26d1bb3588a8c1c546b9beed33405.zip
drm/amdgpu: set nbio/hdp cg for navi12
Same as navi10. Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/nv.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index eb859b311409..e0400a3f09b4 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -794,6 +794,7 @@ static int nv_common_set_clockgating_state(void *handle,
switch (adev->asic_type) {
case CHIP_NAVI10:
case CHIP_NAVI14:
+ case CHIP_NAVI12:
adev->nbio_funcs->update_medium_grain_clock_gating(adev,
state == AMD_CG_STATE_GATE ? true : false);
adev->nbio_funcs->update_medium_grain_light_sleep(adev,