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authorTom Lendacky <thomas.lendacky@amd.com>2020-12-10 18:09:58 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2020-12-15 11:20:54 +0100
commitd1949b93c60504b338c89cf8b3873c0d11feb7ed (patch)
tree031d5a4b3f3a1a4627891cb380074f773bea7d90 /drivers/hid/hid-roccat-arvo.h
parentKVM: SVM: Add support for CR4 write traps for an SEV-ES guest (diff)
downloadlinux-d1949b93c60504b338c89cf8b3873c0d11feb7ed.tar.xz
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KVM: SVM: Add support for CR8 write traps for an SEV-ES guest
For SEV-ES guests, the interception of control register write access is not recommended. Control register interception occurs prior to the control register being modified and the hypervisor is unable to modify the control register itself because the register is located in the encrypted register state. SEV-ES guests introduce new control register write traps. These traps provide intercept support of a control register write after the control register has been modified. The new control register value is provided in the VMCB EXITINFO1 field, allowing the hypervisor to track the setting of the guest control registers. Add support to track the value of the guest CR8 register using the control register write trap so that the hypervisor understands the guest operating mode. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Message-Id: <5a01033f4c8b3106ca9374b7cadf8e33da852df1.1607620209.git.thomas.lendacky@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'drivers/hid/hid-roccat-arvo.h')
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