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authorTomi Valkeinen <tomi.valkeinen@ti.com>2014-10-02 19:58:51 +0200
committerTomi Valkeinen <tomi.valkeinen@ti.com>2015-02-26 11:15:12 +0100
commit386f167c69ca1c6920581f2cb78be8a1f6691539 (patch)
tree57348c22d1db12f80ad47a7f21fc63aef8432979 /drivers/hid/hid-roccat-pyra.h
parentOMAPDSS: change signal_level & signal_edge enum values (diff)
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OMAPDSS: DISPC: change sync_pclk_edge default value
The common 'struct videomode' does not have a flag to select when the sync signals should be driven. The default behavior of DISPC HW is to drive the sync signal on the opposite pixel clock edge from data signal, which is also what the videomode_to_omap_video_timings() uses. However, it looks like what panels usually expect is that the data and sync signals are driven on the same edge, so let's change videomode_to_omap_video_timings() to set the sync_pclk_edge accordingly. Note that this only affect panels drivers that use videomode_to_omap_video_timings(), probably when getting the video timings directly from DT data. The drivers can still configure the sync_pclk_edge independently if they so wish. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers/hid/hid-roccat-pyra.h')
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