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author | Even Xu <even.xu@intel.com> | 2017-02-03 07:24:53 +0100 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2017-02-08 04:11:57 +0100 |
commit | 291e9e3f6931eda50be839500c15b1135146aaf6 (patch) | |
tree | d214c5c7632d3d35a8d9fdbd7f124255e82f797d /drivers/hid/intel-ish-hid/ipc/hw-ish-regs.h | |
parent | HID: intel-ish-hid: format 32-bit integers with %X (diff) | |
download | linux-291e9e3f6931eda50be839500c15b1135146aaf6.tar.xz linux-291e9e3f6931eda50be839500c15b1135146aaf6.zip |
HID: intel-ish-hid: ipc: check FW status to distinguish ISH resume paths
For ISH resume, there are two paths, they need different way to handle: one
where ISH is not powered off, in that case a simple resume message is enough,
in other case we need a reset sequence.
We can use ISH FW status to distinguish those two cases and handle them
properly.
Signed-off-by: Even Xu <even.xu@intel.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/hid/intel-ish-hid/ipc/hw-ish-regs.h')
-rw-r--r-- | drivers/hid/intel-ish-hid/ipc/hw-ish-regs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/hid/intel-ish-hid/ipc/hw-ish-regs.h b/drivers/hid/intel-ish-hid/ipc/hw-ish-regs.h index ab68afcba2a2..a5897b9c0956 100644 --- a/drivers/hid/intel-ish-hid/ipc/hw-ish-regs.h +++ b/drivers/hid/intel-ish-hid/ipc/hw-ish-regs.h @@ -111,6 +111,14 @@ #define IPC_ILUP_BIT (1<<IPC_ILUP_OFFS) /* + * ISH FW status bits in ISH FW Status Register + */ +#define IPC_ISH_FWSTS_SHIFT 12 +#define IPC_ISH_FWSTS_MASK GENMASK(15, 12) +#define IPC_GET_ISH_FWSTS(status) \ + (((status) & IPC_ISH_FWSTS_MASK) >> IPC_ISH_FWSTS_SHIFT) + +/* * FW status bits (relevant) */ #define IPC_FWSTS_ILUP 0x1 |