diff options
| author | Zhang Lixu <lixu.zhang@intel.com> | 2019-08-08 12:21:11 +0200 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2019-08-19 14:01:50 +0200 |
| commit | c1ca58f6982bb815c27a4a75f0f430f87b624f66 (patch) | |
| tree | 429ac78c1fd02d93c24042c1b3df305bf97962f6 /drivers/hid/intel-ish-hid/ipc/ipc.c | |
| parent | Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/hid... (diff) | |
| download | linux-c1ca58f6982bb815c27a4a75f0f430f87b624f66.tar.xz linux-c1ca58f6982bb815c27a4a75f0f430f87b624f66.zip | |
HID: intel-ish-hid: ipc: set NO_D3 flag only when needed
Currently, the NO_D3 flag is set in ish_probe(), and cleared in
ish_remove(). So even if the system goes into S3, ISH is still
in D0i3 state. It makes more sense that put ISH into D3 as system
goes into S3 and put ISH into D0i3 as system goes into suspend-to-idle.
I remove the NO_D3 setting in ish_probe(), so that ISH can enter
D3 state when system enters S3. Only set N0_D3 flag when system
enters the suspend-to-idle or platform specified, and clear it
when system resume.
When the ISH enters D3, the FW will check the DMA bit status.
If the DMA bit is set, the FW will reset automatically. So the
DMA bit need be clear before putting ISH into D3 state.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'drivers/hid/intel-ish-hid/ipc/ipc.c')
| -rw-r--r-- | drivers/hid/intel-ish-hid/ipc/ipc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/hid/intel-ish-hid/ipc/ipc.c b/drivers/hid/intel-ish-hid/ipc/ipc.c index 18fe8af89aad..8f8dfdf64833 100644 --- a/drivers/hid/intel-ish-hid/ipc/ipc.c +++ b/drivers/hid/intel-ish-hid/ipc/ipc.c @@ -672,7 +672,7 @@ eoi: * * Return: 0 for success else error code. */ -static int ish_disable_dma(struct ishtp_device *dev) +int ish_disable_dma(struct ishtp_device *dev) { unsigned int dma_delay; |