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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2020-05-19 14:50:43 +0200
committerWolfram Sang <wsa@kernel.org>2020-05-22 16:50:43 +0200
commit3f35064a7cfef4ed8d25cdb16da0abfbbd525f63 (patch)
treeef36a39ee37d87086f701b0564d7da20916f05ac /drivers/i2c/busses/i2c-designware-pcidrv.c
parenti2c: designware: Read counters from ACPI for PCI driver (diff)
downloadlinux-3f35064a7cfef4ed8d25cdb16da0abfbbd525f63.tar.xz
linux-3f35064a7cfef4ed8d25cdb16da0abfbbd525f63.zip
i2c: designware: Drop hard coded FIFO depth assignment
It's not clear why the commit fe20ff5c7e9c ("i2c-designware: Add support for Designware core behind PCI devices.") followed by commit b61b14154b19 ("i2c-designware: add support for Intel Lynxpoint") chose to hard code FIFO depth size. The FIFO depth on all hardware, I have tested on, can be nicely detected automatically. Thus, we may safely drop hard coded FIFO sizes from the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-designware-pcidrv.c')
-rw-r--r--drivers/i2c/busses/i2c-designware-pcidrv.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index 3664d76bb976..11a5e4751eab 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -46,8 +46,6 @@ struct dw_scl_sda_cfg {
struct dw_pci_controller {
u32 bus_num;
- u32 tx_fifo_depth;
- u32 rx_fifo_depth;
u32 flags;
struct dw_scl_sda_cfg *scl_sda_cfg;
int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
@@ -133,41 +131,29 @@ static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev)
static struct dw_pci_controller dw_pci_controllers[] = {
[medfield] = {
.bus_num = -1,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
.setup = mfld_setup,
.get_clk_rate_khz = mfld_get_clk_rate_khz,
},
[merrifield] = {
.bus_num = -1,
- .tx_fifo_depth = 64,
- .rx_fifo_depth = 64,
.scl_sda_cfg = &mrfld_config,
.setup = mrfld_setup,
},
[baytrail] = {
.bus_num = -1,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
.scl_sda_cfg = &byt_config,
},
[haswell] = {
.bus_num = -1,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
.scl_sda_cfg = &hsw_config,
},
[cherrytrail] = {
.bus_num = -1,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
.flags = MODEL_CHERRYTRAIL,
.scl_sda_cfg = &byt_config,
},
[elkhartlake] = {
.bus_num = -1,
- .tx_fifo_depth = 32,
- .rx_fifo_depth = 32,
.get_clk_rate_khz = ehl_get_clk_rate_khz,
},
};
@@ -277,9 +263,6 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
dev->sda_hold_time = cfg->sda_hold;
}
- dev->tx_fifo_depth = controller->tx_fifo_depth;
- dev->rx_fifo_depth = controller->rx_fifo_depth;
-
adap = &dev->adapter;
adap->owner = THIS_MODULE;
adap->class = 0;