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authorDaniel Kurtz <djkurtz@chromium.org>2012-07-24 14:13:58 +0200
committerJean Delvare <khali@endymion.delvare>2012-07-24 14:13:58 +0200
commit37af871112e1dec1e39dfac782f0be5926be1c88 (patch)
treeceea12fef1f8a412509ae903cacb8d30b248ed9f /drivers/i2c/busses/i2c-i801.c
parenti2c-i801: Rename some SMBHSTCNT bit constants (diff)
downloadlinux-37af871112e1dec1e39dfac782f0be5926be1c88.tar.xz
linux-37af871112e1dec1e39dfac782f0be5926be1c88.zip
i2c-i801: Drop ENABLE_INT9
Later patches enable interrupts. This preliminary patch removes the older unsupported ENABLE_INT9 flag. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-i801.c')
-rw-r--r--drivers/i2c/busses/i2c-i801.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 016fa22f1351..569a282e3347 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -104,7 +104,6 @@
/* Other settings */
#define MAX_RETRIES 400
-#define ENABLE_INT9 0 /* set to 0x01 to enable - untested */
/* I801 command constants */
#define I801_QUICK 0x00
@@ -271,7 +270,7 @@ static int i801_transaction(struct i801_priv *priv, int xact)
return result;
/* the current contents of SMBHSTCNT can be overwritten, since PEC,
- * INTREN, SMBSCMD are passed in xact */
+ * SMBSCMD are passed in xact */
outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
/* We will always wait for a fraction of a second! */
@@ -323,7 +322,7 @@ static int i801_block_transaction_by_block(struct i801_priv *priv,
outb_p(data->block[i+1], SMBBLKDAT(priv));
}
- status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 |
+ status = i801_transaction(priv, I801_BLOCK_DATA |
(hwpec ? SMBHSTCNT_PEC_EN : 0));
if (status)
return status;
@@ -376,7 +375,7 @@ static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
for (i = 1; i <= len; i++) {
if (i == len && read_write == I2C_SMBUS_READ)
smbcmd |= SMBHSTCNT_LAST_BYTE;
- outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
+ outb_p(smbcmd, SMBHSTCNT(priv));
if (i == 1)
outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
@@ -567,7 +566,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
ret = i801_block_transaction(priv, data, read_write, size,
hwpec);
else
- ret = i801_transaction(priv, xact | ENABLE_INT9);
+ ret = i801_transaction(priv, xact);
/* Some BIOSes don't like it when PEC is enabled at reboot or resume
time, so we forcibly disable it after every transaction. Turn off