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| author | Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> | 2018-09-03 11:41:11 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa@the-dreams.de> | 2018-09-06 20:49:09 +0200 |
| commit | ae7304c3ea28a3ba47a7a8312c76c654ef24967e (patch) | |
| tree | 4c61d7881ff1dc2a59c66ddc63b89887a165e5f0 /drivers/i2c/busses/i2c-sibyte.c | |
| parent | i2c: i801: fix DNV's SMBCTRL register offset (diff) | |
| download | linux-ae7304c3ea28a3ba47a7a8312c76c654ef24967e.tar.xz linux-ae7304c3ea28a3ba47a7a8312c76c654ef24967e.zip | |
i2c: xiic: Make the start and the byte count write atomic
Disable interrupts while configuring the transfer and enable them back.
We have below as the programming sequence
1. start and slave address
2. byte count and stop
In some customer platform there was a lot of interrupts between 1 and 2
and after slave address (around 7 clock cyles) if 2 is not executed
then the transaction is nacked.
To fix this case make the 2 writes atomic.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[wsa: added a newline for better readability]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
Diffstat (limited to 'drivers/i2c/busses/i2c-sibyte.c')
0 files changed, 0 insertions, 0 deletions