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author | Romain Baeriswyl <Romain.Baeriswyl@abilis.com> | 2014-08-20 16:29:08 +0200 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2014-09-29 22:41:16 +0200 |
commit | 8e5f6b2a289c4374456fb785900b0b7445b719e6 (patch) | |
tree | 65ebc1319d0c63a6d09d125930fcffa21f1f3177 /drivers/i2c | |
parent | Linux 3.17-rc7 (diff) | |
download | linux-8e5f6b2a289c4374456fb785900b0b7445b719e6.tar.xz linux-8e5f6b2a289c4374456fb785900b0b7445b719e6.zip |
i2c: designware: add support of I2C standard mode
Some legacy devices support ony I2C standard mode at 100kHz.
This patch allows to select the standard mode through the DTS
with the use of the existing clock-frequency parameter.
When clock-frequency parameter is not set, the fast mode is selected.
Only when the parameter is set at 100000, the standard mode is selected.
Signed-off-by: Romain Baeriswyl <romainba@abilis.com>
Reviewed-by: Christian Ruppert <christian.ruppert@abilis.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'drivers/i2c')
-rw-r--r-- | drivers/i2c/busses/i2c-designware-platdrv.c | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index bc8773333155..8193e8eea764 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -123,6 +123,7 @@ static int dw_i2c_probe(struct platform_device *pdev) struct i2c_adapter *adap; struct resource *mem; int irq, r; + u32 clk_freq; irq = platform_get_irq(pdev, 0); if (irq < 0) { @@ -152,6 +153,9 @@ static int dw_i2c_probe(struct platform_device *pdev) return PTR_ERR(dev->clk); clk_prepare_enable(dev->clk); + /* fast mode by default because of legacy reasons */ + clk_freq = 400000; + if (pdev->dev.of_node) { u32 ht = 0; u32 ic_clk = dev->get_clk_rate_khz(dev); @@ -167,6 +171,17 @@ static int dw_i2c_probe(struct platform_device *pdev) of_property_read_u32(pdev->dev.of_node, "i2c-scl-falling-time-ns", &dev->scl_falling_time); + + of_property_read_u32(pdev->dev.of_node, "clock-frequency", + &clk_freq); + + /* Only standard mode at 100kHz and fast mode at 400kHz + * are supported. + */ + if (clk_freq != 100000 && clk_freq != 400000) { + dev_err(&pdev->dev, "Only 100kHz and 400kHz supported"); + return -EINVAL; + } } dev->functionality = @@ -176,8 +191,12 @@ static int dw_i2c_probe(struct platform_device *pdev) I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_I2C_BLOCK; - dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | - DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; + if (clk_freq == 100000) + dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | + DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD; + else + dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | + DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; /* Try first if we can configure the device from ACPI */ r = dw_i2c_acpi_configure(pdev); |