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| author | Robert Richter <robert.richter@amd.com> | 2010-04-23 14:30:22 +0200 |
|---|---|---|
| committer | Robert Richter <robert.richter@amd.com> | 2010-04-23 14:30:22 +0200 |
| commit | a36bf32e9e8a86f291f746b7f8292e042ee04a46 (patch) | |
| tree | c5c999baa4c214218e3adea9b336cbd9f23950ad /drivers/ide/ide-timings.c | |
| parent | oprofile: convert oprofile from timer_hook to hrtimer (diff) | |
| parent | Linux 2.6.34-rc5 (diff) | |
| download | linux-a36bf32e9e8a86f291f746b7f8292e042ee04a46.tar.xz linux-a36bf32e9e8a86f291f746b7f8292e042ee04a46.zip | |
Merge commit 'v2.6.34-rc5' into oprofile/core
Diffstat (limited to 'drivers/ide/ide-timings.c')
| -rw-r--r-- | drivers/ide/ide-timings.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/ide/ide-timings.c b/drivers/ide/ide-timings.c index 001a56365be5..0e05f75934c9 100644 --- a/drivers/ide/ide-timings.c +++ b/drivers/ide/ide-timings.c @@ -166,12 +166,13 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed, if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ memset(&p, 0, sizeof(p)); - if (speed <= XFER_PIO_2) - p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; - else if ((speed <= XFER_PIO_4) || - (speed == XFER_PIO_5 && !ata_id_is_cfa(id))) - p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; - else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) + if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) { + if (speed <= XFER_PIO_2) + p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO]; + else if ((speed <= XFER_PIO_4) || + (speed == XFER_PIO_5 && !ata_id_is_cfa(id))) + p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY]; + } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) p.cycle = id[ATA_ID_EIDE_DMA_MIN]; ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B); @@ -185,11 +186,10 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed, /* * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, * S.M.A.R.T and some other commands. We have to ensure that the - * DMA cycle timing is slower/equal than the fastest PIO timing. + * DMA cycle timing is slower/equal than the current PIO timing. */ if (speed >= XFER_SW_DMA_0) { - u8 pio = ide_get_best_pio_mode(drive, 255, 5); - ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT); + ide_timing_compute(drive, drive->pio_mode, &p, T, UT); ide_timing_merge(&p, t, t, IDE_TIMING_ALL); } |