diff options
author | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-04-26 22:25:24 +0200 |
---|---|---|
committer | Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> | 2008-04-26 22:25:24 +0200 |
commit | 5e37bdc081a980dd0d669e6387bcf15ca9666f81 (patch) | |
tree | d842166c3bd23fbf3dfba0ccaa0f9ed5cc3096db /drivers/ide/pci | |
parent | ide: add IDE_HFLAG_SERIALIZE_DMA host flag (diff) | |
download | linux-5e37bdc081a980dd0d669e6387bcf15ca9666f81.tar.xz linux-5e37bdc081a980dd0d669e6387bcf15ca9666f81.zip |
ide: add struct ide_dma_ops (take 3)
Add struct ide_dma_ops and convert core code + drivers to use it.
While at it:
* Drop "ide_" prefix from ->ide_dma_end and ->ide_dma_test_irq methods.
* Drop "ide_" "infixes" from DMA methods.
* au1xxx-ide.c:
- use auide_dma_{test_irq,end}() directly in auide_dma_timeout()
* pdc202xx_old.c:
- drop "old_" "infixes" from DMA methods
* siimage.c:
- add siimage_dma_test_irq() helper
- print SATA warning in siimage_init_one()
* Remove no longer needed ->init_hwif implementations.
v2:
* Changes based on review from Sergei:
- s/siimage_ide_dma_test_irq/siimage_dma_test_irq/
- s/drive->hwif/hwif/ in idefloppy_pc_intr().
- fix patch description w.r.t. au1xxx-ide changes
- fix au1xxx-ide build
- fix naming for cmd64*_dma_ops
- drop "ide_" and "old_" infixes
- s/hpt3xxx_dma_ops/hpt37x_dma_ops/
- s/hpt370x_dma_ops/hpt370_dma_ops/
- use correct DMA ops for HPT302/N, HPT371/N and HPT374
- s/it821x_smart_dma_ops/it821x_pass_through_dma_ops/
v3:
* Two bugs slipped in v2 (noticed by Sergei):
- use correct DMA ops for HPT374 (for real this time)
- handle HPT370/HPT370A properly
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide/pci')
-rw-r--r-- | drivers/ide/pci/alim15x3.c | 32 | ||||
-rw-r--r-- | drivers/ide/pci/cmd64x.c | 110 | ||||
-rw-r--r-- | drivers/ide/pci/cs5520.c | 14 | ||||
-rw-r--r-- | drivers/ide/pci/hpt366.c | 48 | ||||
-rw-r--r-- | drivers/ide/pci/it821x.c | 8 | ||||
-rw-r--r-- | drivers/ide/pci/ns87415.c | 12 | ||||
-rw-r--r-- | drivers/ide/pci/pdc202xx_old.c | 41 | ||||
-rw-r--r-- | drivers/ide/pci/sc1200.c | 22 | ||||
-rw-r--r-- | drivers/ide/pci/scc_pata.c | 15 | ||||
-rw-r--r-- | drivers/ide/pci/sgiioc4.c | 38 | ||||
-rw-r--r-- | drivers/ide/pci/siimage.c | 76 | ||||
-rw-r--r-- | drivers/ide/pci/sl82c105.c | 27 | ||||
-rw-r--r-- | drivers/ide/pci/tc86c001.c | 7 | ||||
-rw-r--r-- | drivers/ide/pci/trm290.c | 20 |
14 files changed, 224 insertions, 246 deletions
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c index 5261f308d946..987db35199e6 100644 --- a/drivers/ide/pci/alim15x3.c +++ b/drivers/ide/pci/alim15x3.c @@ -652,21 +652,7 @@ static u8 __devinit ali_cable_detect(ide_hwif_t *hwif) return cbl; } -/** - * init_hwif_common_ali15x3 - Set up ALI IDE hardware - * @hwif: IDE interface - * - * Initialize the IDE structure side of the ALi 15x3 driver. - */ - -static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif) -{ - if (hwif->dma_base == 0) - return; - - hwif->dma_setup = &ali15x3_dma_setup; -} - +#ifndef CONFIG_SPARC64 /** * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff * @hwif: interface to configure @@ -716,9 +702,8 @@ static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) if(irq >= 0) hwif->irq = irq; } - - init_hwif_common_ali15x3(hwif); } +#endif /** * init_dma_ali15x3 - set up DMA on ALi15x3 @@ -746,7 +731,7 @@ static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, if (ide_allocate_dma_engine(hwif)) return -1; - ide_setup_dma(hwif, base); + ide_setup_dma(hwif, base, d); return 0; } @@ -758,10 +743,16 @@ static const struct ide_port_ops ali_port_ops = { .cable_detect = ali_cable_detect, }; +static struct ide_dma_ops ali_dma_ops = { + .dma_setup = ali15x3_dma_setup, +}; + static const struct ide_port_info ali15x3_chipset __devinitdata = { .name = "ALI15X3", .init_chipset = init_chipset_ali15x3, +#ifndef CONFIG_SPARC64 .init_hwif = init_hwif_ali15x3, +#endif .init_dma = init_dma_ali15x3, .port_ops = &ali_port_ops, .pio_mask = ATA_PIO5, @@ -806,6 +797,8 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev d.udma_mask = ATA_UDMA5; else d.udma_mask = ATA_UDMA6; + + d.dma_ops = &ali_dma_ops; } else { d.host_flags |= IDE_HFLAG_NO_DMA; @@ -815,9 +808,6 @@ static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_dev if (idx == 0) d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; -#if defined(CONFIG_SPARC64) - d.init_hwif = init_hwif_common_ali15x3; -#endif /* CONFIG_SPARC64 */ return ide_setup_pci_device(dev, &d); } diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c index 5411ded791bb..5fd252e6ed08 100644 --- a/drivers/ide/pci/cmd64x.c +++ b/drivers/ide/pci/cmd64x.c @@ -223,7 +223,7 @@ static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed) (void) pci_write_config_byte(dev, pciU, regU); } -static int cmd648_ide_dma_end (ide_drive_t *drive) +static int cmd648_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long base = hwif->dma_base - (hwif->channel * 8); @@ -239,7 +239,7 @@ static int cmd648_ide_dma_end (ide_drive_t *drive) return err; } -static int cmd64x_ide_dma_end (ide_drive_t *drive) +static int cmd64x_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -256,7 +256,7 @@ static int cmd64x_ide_dma_end (ide_drive_t *drive) return err; } -static int cmd648_ide_dma_test_irq (ide_drive_t *drive) +static int cmd648_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long base = hwif->dma_base - (hwif->channel * 8); @@ -279,7 +279,7 @@ static int cmd648_ide_dma_test_irq (ide_drive_t *drive) return 0; } -static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) +static int cmd64x_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -310,7 +310,7 @@ static int cmd64x_ide_dma_test_irq (ide_drive_t *drive) * event order for DMA transfers. */ -static int cmd646_1_ide_dma_end (ide_drive_t *drive) +static int cmd646_1_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); u8 dma_stat = 0, dma_cmd = 0; @@ -385,62 +385,33 @@ static u8 __devinit cmd64x_cable_detect(ide_hwif_t *hwif) } } -static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) -{ - struct pci_dev *dev = to_pci_dev(hwif->dev); - - if (!hwif->dma_base) - return; - - /* - * UltraDMA only supported on PCI646U and PCI646U2, which - * correspond to revisions 0x03, 0x05 and 0x07 respectively. - * Actually, although the CMD tech support people won't - * tell me the details, the 0x03 revision cannot support - * UDMA correctly without hardware modifications, and even - * then it only works with Quantum disks due to some - * hold time assumptions in the 646U part which are fixed - * in the 646U2. - * - * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. - */ - if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5) - hwif->ultra_mask = 0x00; - - switch (dev->device) { - case PCI_DEVICE_ID_CMD_648: - case PCI_DEVICE_ID_CMD_649: - alt_irq_bits: - hwif->ide_dma_end = &cmd648_ide_dma_end; - hwif->ide_dma_test_irq = &cmd648_ide_dma_test_irq; - break; - case PCI_DEVICE_ID_CMD_646: - if (dev->revision == 0x01) { - hwif->ide_dma_end = &cmd646_1_ide_dma_end; - break; - } else if (dev->revision >= 0x03) - goto alt_irq_bits; - /* fall thru */ - default: - hwif->ide_dma_end = &cmd64x_ide_dma_end; - hwif->ide_dma_test_irq = &cmd64x_ide_dma_test_irq; - break; - } -} - static const struct ide_port_ops cmd64x_port_ops = { .set_pio_mode = cmd64x_set_pio_mode, .set_dma_mode = cmd64x_set_dma_mode, .cable_detect = cmd64x_cable_detect, }; +static struct ide_dma_ops cmd64x_dma_ops = { + .dma_end = cmd64x_dma_end, + .dma_test_irq = cmd64x_dma_test_irq, +}; + +static struct ide_dma_ops cmd646_rev1_dma_ops = { + .dma_end = cmd646_1_dma_end, +}; + +static struct ide_dma_ops cmd648_dma_ops = { + .dma_end = cmd648_dma_end, + .dma_test_irq = cmd648_dma_test_irq, +}; + static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { { /* 0 */ .name = "CMD643", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd64x_dma_ops, .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, @@ -449,10 +420,10 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { },{ /* 1 */ .name = "CMD646", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .chipset = ide_cmd646, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd648_dma_ops, .host_flags = IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, @@ -460,9 +431,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { },{ /* 2 */ .name = "CMD648", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd648_dma_ops, .host_flags = IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, @@ -470,9 +441,9 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { },{ /* 3 */ .name = "CMD649", .init_chipset = init_chipset_cmd64x, - .init_hwif = init_hwif_cmd64x, .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, .port_ops = &cmd64x_port_ops, + .dma_ops = &cmd648_dma_ops, .host_flags = IDE_HFLAG_ABUSE_PREFETCH, .pio_mask = ATA_PIO5, .mwdma_mask = ATA_MWDMA2, @@ -487,12 +458,35 @@ static int __devinit cmd64x_init_one(struct pci_dev *dev, const struct pci_devic d = cmd64x_chipsets[idx]; - /* - * The original PCI0646 didn't have the primary channel enable bit, - * it appeared starting with PCI0646U (i.e. revision ID 3). - */ - if (idx == 1 && dev->revision < 3) - d.enablebits[0].reg = 0; + if (idx == 1) { + /* + * UltraDMA only supported on PCI646U and PCI646U2, which + * correspond to revisions 0x03, 0x05 and 0x07 respectively. + * Actually, although the CMD tech support people won't + * tell me the details, the 0x03 revision cannot support + * UDMA correctly without hardware modifications, and even + * then it only works with Quantum disks due to some + * hold time assumptions in the 646U part which are fixed + * in the 646U2. + * + * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. + */ + if (dev->revision < 5) { + d.udma_mask = 0x00; + /* + * The original PCI0646 didn't have the primary + * channel enable bit, it appeared starting with + * PCI0646U (i.e. revision ID 3). + */ + if (dev->revision < 3) { + d.enablebits[0].reg = 0; + if (dev->revision == 1) + d.dma_ops = &cmd646_rev1_dma_ops; + else + d.dma_ops = &cmd64x_dma_ops; + } + } + } return ide_setup_pci_device(dev, &d); } diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c index 41559c6de0ca..467d331c8109 100644 --- a/drivers/ide/pci/cs5520.c +++ b/drivers/ide/pci/cs5520.c @@ -103,24 +103,20 @@ static void cs5520_dma_host_set(ide_drive_t *drive, int on) ide_dma_host_set(drive, on); } -static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) -{ - if (hwif->dma_base == 0) - return; - - hwif->dma_host_set = &cs5520_dma_host_set; -} - static const struct ide_port_ops cs5520_port_ops = { .set_pio_mode = cs5520_set_pio_mode, .set_dma_mode = cs5520_set_dma_mode, }; +static struct ide_dma_ops cs5520_dma_ops = { + .dma_host_set = cs5520_dma_host_set, +}; + #define DECLARE_CS_DEV(name_str) \ { \ .name = name_str, \ - .init_hwif = init_hwif_cs5520, \ .port_ops = &cs5520_port_ops, \ + .dma_ops = &cs5520_dma_ops, \ .host_flags = IDE_HFLAG_ISA_PORTS | \ IDE_HFLAG_CS5520 | \ IDE_HFLAG_VDMA | \ diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c index e5e64436ffd9..5030bda1adeb 100644 --- a/drivers/ide/pci/hpt366.c +++ b/drivers/ide/pci/hpt366.c @@ -808,7 +808,7 @@ static void hpt370_irq_timeout(ide_drive_t *drive) hpt370_clear_engine(drive); } -static void hpt370_ide_dma_start(ide_drive_t *drive) +static void hpt370_dma_start(ide_drive_t *drive) { #ifdef HPT_RESET_STATE_ENGINE hpt370_clear_engine(drive); @@ -816,7 +816,7 @@ static void hpt370_ide_dma_start(ide_drive_t *drive) ide_dma_start(drive); } -static int hpt370_ide_dma_end(ide_drive_t *drive) +static int hpt370_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); u8 dma_stat = inb(hwif->dma_status); @@ -838,7 +838,7 @@ static void hpt370_dma_timeout(ide_drive_t *drive) } /* returns 1 if DMA IRQ issued, 0 otherwise */ -static int hpt374_ide_dma_test_irq(ide_drive_t *drive) +static int hpt374_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -862,7 +862,7 @@ static int hpt374_ide_dma_test_irq(ide_drive_t *drive) return 0; } -static int hpt374_ide_dma_end(ide_drive_t *drive) +static int hpt374_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -1312,19 +1312,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) if (new_mcr != old_mcr) pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); - - if (hwif->dma_base == 0) - return; - - if (chip_type >= HPT374) { - hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq; - hwif->ide_dma_end = &hpt374_ide_dma_end; - } else if (chip_type >= HPT370) { - hwif->dma_start = &hpt370_ide_dma_start; - hwif->ide_dma_end = &hpt370_ide_dma_end; - hwif->dma_timeout = &hpt370_dma_timeout; - } else - hwif->dma_lost_irq = &hpt366_dma_lost_irq; } static int __devinit init_dma_hpt366(ide_hwif_t *hwif, @@ -1360,7 +1347,7 @@ static int __devinit init_dma_hpt366(ide_hwif_t *hwif, if (ide_allocate_dma_engine(hwif)) return -1; - ide_setup_dma(hwif, base); + ide_setup_dma(hwif, base, d); return 0; } @@ -1428,6 +1415,21 @@ static const struct ide_port_ops hpt3xx_port_ops = { .cable_detect = hpt3xx_cable_detect, }; +static struct ide_dma_ops hpt37x_dma_ops = { + .dma_end = hpt374_dma_end, + .dma_test_irq = hpt374_dma_test_irq, +}; + +static struct ide_dma_ops hpt370_dma_ops = { + .dma_start = hpt370_dma_start, + .dma_end = hpt370_dma_end, + .dma_timeout = hpt370_dma_timeout, +}; + +static struct ide_dma_ops hpt36x_dma_ops = { + .dma_lost_irq = hpt366_dma_lost_irq, +}; + static const struct ide_port_info hpt366_chipsets[] __devinitdata = { { /* 0 */ .name = "HPT36x", @@ -1442,6 +1444,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { */ .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, .port_ops = &hpt3xx_port_ops, + .dma_ops = &hpt36x_dma_ops, .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1452,6 +1455,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .port_ops = &hpt3xx_port_ops, + .dma_ops = &hpt37x_dma_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1462,6 +1466,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .port_ops = &hpt3xx_port_ops, + .dma_ops = &hpt37x_dma_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1472,6 +1477,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .port_ops = &hpt3xx_port_ops, + .dma_ops = &hpt37x_dma_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1483,6 +1489,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .udma_mask = ATA_UDMA5, .port_ops = &hpt3xx_port_ops, + .dma_ops = &hpt37x_dma_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1493,6 +1500,7 @@ static const struct ide_port_info hpt366_chipsets[] __devinitdata = { .init_dma = init_dma_hpt366, .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, .port_ops = &hpt3xx_port_ops, + .dma_ops = &hpt37x_dma_ops, .host_flags = IDE_HFLAGS_HPT3XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, @@ -1555,6 +1563,10 @@ static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_devic d.name = info->chip_name; d.udma_mask = info->udma_mask; + /* fixup ->dma_ops for HPT370/HPT370A */ + if (info == &hpt370 || info == &hpt370a) + d.dma_ops = &hpt370_dma_ops; + pci_set_drvdata(dev, (void *)info); if (info == &hpt36x || info == &hpt374) diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c index 7f4db1c0a4fc..6ab04115286b 100644 --- a/drivers/ide/pci/it821x.c +++ b/drivers/ide/pci/it821x.c @@ -511,6 +511,11 @@ static void __devinit it821x_quirkproc(ide_drive_t *drive) } +static struct ide_dma_ops it821x_pass_through_dma_ops = { + .dma_start = it821x_dma_start, + .dma_end = it821x_dma_end, +}; + /** * init_hwif_it821x - set up hwif structs * @hwif: interface to set up @@ -562,8 +567,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif) if (idev->smart == 0) { /* MWDMA/PIO clock switching for pass through mode */ - hwif->dma_start = &it821x_dma_start; - hwif->ide_dma_end = &it821x_dma_end; + hwif->dma_ops = &it821x_pass_through_dma_ops; } else hwif->host_flags |= IDE_HFLAG_NO_SET_MODE; diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c index 332de832f171..5a6dec0e1f4d 100644 --- a/drivers/ide/pci/ns87415.c +++ b/drivers/ide/pci/ns87415.c @@ -150,7 +150,7 @@ static void ns87415_selectproc (ide_drive_t *drive) ns87415_prepare_drive (drive, drive->using_dma); } -static int ns87415_ide_dma_end (ide_drive_t *drive) +static int ns87415_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); u8 dma_stat = 0, dma_cmd = 0; @@ -170,7 +170,7 @@ static int ns87415_ide_dma_end (ide_drive_t *drive) return (dma_stat & 7) != 4; } -static int ns87415_ide_dma_setup(ide_drive_t *drive) +static int ns87415_dma_setup(ide_drive_t *drive) { /* select DMA xfer */ ns87415_prepare_drive(drive, 1); @@ -252,14 +252,17 @@ static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif) return; outb(0x60, hwif->dma_status); - hwif->dma_setup = &ns87415_ide_dma_setup; - hwif->ide_dma_end = &ns87415_ide_dma_end; } static const struct ide_port_ops ns87415_port_ops = { .selectproc = ns87415_selectproc, }; +static struct ide_dma_ops ns87415_dma_ops = { + .dma_setup = ns87415_dma_setup, + .dma_end = ns87415_dma_end, +}; + static const struct ide_port_info ns87415_chipset __devinitdata = { .name = "NS87415", #ifdef CONFIG_SUPERIO @@ -267,6 +270,7 @@ static const struct ide_port_info ns87415_chipset __devinitdata = { #endif .init_hwif = init_hwif_ns87415, .port_ops = &ns87415_port_ops, + .dma_ops = &ns87415_dma_ops, .host_flags = IDE_HFLAG_TRUST_BIOS_FOR_DMA | IDE_HFLAG_NO_ATAPI_DMA, }; diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c index 24e440de4c80..9c490fd63fde 100644 --- a/drivers/ide/pci/pdc202xx_old.c +++ b/drivers/ide/pci/pdc202xx_old.c @@ -163,7 +163,7 @@ static void pdc202xx_quirkproc(ide_drive_t *drive) drive->quirk_list = 0; } -static void pdc202xx_old_ide_dma_start(ide_drive_t *drive) +static void pdc202xx_dma_start(ide_drive_t *drive) { if (drive->current_speed > XFER_UDMA_2) pdc_old_enable_66MHz_clock(drive->hwif); @@ -185,7 +185,7 @@ static void pdc202xx_old_ide_dma_start(ide_drive_t *drive) ide_dma_start(drive); } -static int pdc202xx_old_ide_dma_end(ide_drive_t *drive) +static int pdc202xx_dma_end(ide_drive_t *drive) { if (drive->media != ide_disk || drive->addressing == 1) { ide_hwif_t *hwif = HWIF(drive); @@ -202,7 +202,7 @@ static int pdc202xx_old_ide_dma_end(ide_drive_t *drive) return __ide_dma_end(drive); } -static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive) +static int pdc202xx_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long high_16 = hwif->extra_base - 16; @@ -263,23 +263,6 @@ static void pdc202xx_dma_timeout(ide_drive_t *drive) ide_dma_timeout(drive); } -static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif) -{ - struct pci_dev *dev = to_pci_dev(hwif->dev); - - if (hwif->dma_base == 0) - return; - - hwif->dma_lost_irq = &pdc202xx_dma_lost_irq; - hwif->dma_timeout = &pdc202xx_dma_timeout; - - if (dev->device != PCI_DEVICE_ID_PROMISE_20246) { - hwif->dma_start = &pdc202xx_old_ide_dma_start; - hwif->ide_dma_end = &pdc202xx_old_ide_dma_end; - } - hwif->ide_dma_test_irq = &pdc202xx_old_ide_dma_test_irq; -} - static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, const char *name) { @@ -346,12 +329,26 @@ static const struct ide_port_ops pdc2026x_port_ops = { .cable_detect = pdc2026x_cable_detect, }; +static struct ide_dma_ops pdc20246_dma_ops = { + .dma_test_irq = pdc202xx_dma_test_irq, + .dma_lost_irq = pdc202xx_dma_lost_irq, + .dma_timeout = pdc202xx_dma_timeout, +}; + +static struct ide_dma_ops pdc2026x_dma_ops = { + .dma_start = pdc202xx_dma_start, + .dma_end = pdc202xx_dma_end, + .dma_test_irq = pdc202xx_dma_test_irq, + .dma_lost_irq = pdc202xx_dma_lost_irq, + .dma_timeout = pdc202xx_dma_timeout, +}; + #define DECLARE_PDC2026X_DEV(name_str, udma, extra_flags) \ { \ .name = name_str, \ .init_chipset = init_chipset_pdc202xx, \ - .init_hwif = init_hwif_pdc202xx, \ .port_ops = &pdc2026x_port_ops, \ + .dma_ops = &pdc2026x_dma_ops, \ .host_flags = IDE_HFLAGS_PDC202XX | extra_flags, \ .pio_mask = ATA_PIO4, \ .mwdma_mask = ATA_MWDMA2, \ @@ -362,8 +359,8 @@ static const struct ide_port_info pdc202xx_chipsets[] __devinitdata = { { /* 0 */ .name = "PDC20246", .init_chipset = init_chipset_pdc202xx, - .init_hwif = init_hwif_pdc202xx, .port_ops = &pdc20246_port_ops, + .dma_ops = &pdc20246_dma_ops, .host_flags = IDE_HFLAGS_PDC202XX, .pio_mask = ATA_PIO4, .mwdma_mask = ATA_MWDMA2, diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c index 0c144770a8da..303bcfb2a441 100644 --- a/drivers/ide/pci/sc1200.c +++ b/drivers/ide/pci/sc1200.c @@ -165,7 +165,7 @@ static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode) * * returns 1 on error, 0 otherwise */ -static int sc1200_ide_dma_end (ide_drive_t *drive) +static int sc1200_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long dma_base = hwif->dma_base; @@ -214,7 +214,7 @@ static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio) printk("SC1200: %s: changing (U)DMA mode\n", drive->name); ide_dma_off_quietly(drive); if (ide_set_dma_mode(drive, mode) == 0 && drive->using_dma) - hwif->dma_host_set(drive, 1); + hwif->dma_ops->dma_host_set(drive, 1); return; } @@ -286,28 +286,20 @@ static int sc1200_resume (struct pci_dev *dev) } #endif -/* - * This gets invoked by the IDE driver once for each channel, - * and performs channel-specific pre-initialization before drive probing. - */ -static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif) -{ - if (hwif->dma_base == 0) - return; - - hwif->ide_dma_end = &sc1200_ide_dma_end; -} - static const struct ide_port_ops sc1200_port_ops = { .set_pio_mode = sc1200_set_pio_mode, .set_dma_mode = sc1200_set_dma_mode, .udma_filter = sc1200_udma_filter, }; +static struct ide_dma_ops sc1200_dma_ops = { + .dma_end = sc1200_dma_end, +}; + static const struct ide_port_info sc1200_chipset __devinitdata = { .name = "SC1200", - .init_hwif = init_hwif_sc1200, .port_ops = &sc1200_port_ops, + .dma_ops = &sc1200_dma_ops, .host_flags = IDE_HFLAG_SERIALIZE | IDE_HFLAG_POST_SET_MODE | IDE_HFLAG_ABUSE_DMA_MODES, diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c index c30b0c44c705..5117c11134cd 100644 --- a/drivers/ide/pci/scc_pata.c +++ b/drivers/ide/pci/scc_pata.c @@ -317,14 +317,14 @@ static int scc_dma_setup(ide_drive_t *drive) /** - * scc_ide_dma_end - Stop DMA + * scc_dma_end - Stop DMA * @drive: IDE drive * * Check and clear INT Status register. * Then call __ide_dma_end(). */ -static int scc_ide_dma_end(ide_drive_t * drive) +static int scc_dma_end(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long intsts_port = hwif->dma_base + 0x014; @@ -692,10 +692,6 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif) /* PTERADD */ out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma); - hwif->dma_setup = scc_dma_setup; - hwif->ide_dma_end = scc_ide_dma_end; - hwif->ide_dma_test_irq = scc_dma_test_irq; - if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN) hwif->ultra_mask = ATA_UDMA6; /* 133MHz */ else @@ -709,12 +705,19 @@ static const struct ide_port_ops scc_port_ops = { .cable_detect = scc_cable_detect, }; +static struct ide_dma_ops scc_dma_ops = { + .dma_setup = scc_dma_setup, + .dma_end = scc_dma_end, + .dma_test_irq = scc_dma_test_irq, +}; + #define DECLARE_SCC_DEV(name_str) \ { \ .name = name_str, \ .init_iops = init_iops_scc, \ .init_hwif = init_hwif_scc, \ .port_ops = &scc_port_ops, \ + .dma_ops = &scc_dma_ops, \ .host_flags = IDE_HFLAG_SINGLE, \ .pio_mask = ATA_PIO4, \ } diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c index 47d6e0492dda..2cbb7fd1ddec 100644 --- a/drivers/ide/pci/sgiioc4.c +++ b/drivers/ide/pci/sgiioc4.c @@ -188,7 +188,7 @@ sgiioc4_clearirq(ide_drive_t * drive) return intr_reg & 3; } -static void sgiioc4_ide_dma_start(ide_drive_t * drive) +static void sgiioc4_dma_start(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long ioc4_dma_addr = hwif->dma_base + IOC4_DMA_CTRL * 4; @@ -215,8 +215,7 @@ sgiioc4_ide_dma_stop(ide_hwif_t *hwif, u64 dma_base) } /* Stops the IOC4 DMA Engine */ -static int -sgiioc4_ide_dma_end(ide_drive_t * drive) +static int sgiioc4_dma_end(ide_drive_t *drive) { u32 ioc4_dma, bc_dev, bc_mem, num, valid = 0, cnt = 0; ide_hwif_t *hwif = HWIF(drive); @@ -279,8 +278,7 @@ static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed) } /* returns 1 if dma irq issued, 0 otherwise */ -static int -sgiioc4_ide_dma_test_irq(ide_drive_t * drive) +static int sgiioc4_dma_test_irq(ide_drive_t *drive) { return sgiioc4_checkirq(HWIF(drive)); } @@ -294,7 +292,7 @@ static void sgiioc4_dma_host_set(ide_drive_t *drive, int on) static void sgiioc4_resetproc(ide_drive_t * drive) { - sgiioc4_ide_dma_end(drive); + sgiioc4_dma_end(drive); sgiioc4_clearirq(drive); } @@ -327,8 +325,6 @@ sgiioc4_INB(unsigned long port) return reg; } -static void __devinit ide_init_sgiioc4(ide_hwif_t *); - /* Creates a dma map for the scatter-gather list entries */ static int __devinit ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d) @@ -377,7 +373,6 @@ ide_dma_sgiioc4(ide_hwif_t *hwif, const struct ide_port_info *d) if (pad) { ide_set_hwifdata(hwif, pad); - ide_init_sgiioc4(hwif); return 0; } @@ -526,7 +521,7 @@ use_pio_instead: return 0; /* revert to PIO for this request */ } -static int sgiioc4_ide_dma_setup(ide_drive_t *drive) +static int sgiioc4_dma_setup(ide_drive_t *drive) { struct request *rq = HWGROUP(drive)->rq; unsigned int count = 0; @@ -555,18 +550,6 @@ static int sgiioc4_ide_dma_setup(ide_drive_t *drive) return 0; } -static void __devinit -ide_init_sgiioc4(ide_hwif_t * hwif) -{ - hwif->dma_host_set = &sgiioc4_dma_host_set; - hwif->dma_setup = &sgiioc4_ide_dma_setup; - hwif->dma_start = &sgiioc4_ide_dma_start; - hwif->ide_dma_end = &sgiioc4_ide_dma_end; - hwif->ide_dma_test_irq = &sgiioc4_ide_dma_test_irq; - hwif->dma_lost_irq = &sgiioc4_dma_lost_irq; - hwif->dma_timeout = &ide_dma_timeout; -} - static const struct ide_port_ops sgiioc4_port_ops = { .set_dma_mode = sgiioc4_set_dma_mode, /* reset DMA engine, clear IRQs */ @@ -575,10 +558,21 @@ static const struct ide_port_ops sgiioc4_port_ops = { .maskproc = sgiioc4_maskproc, }; +static struct ide_dma_ops sgiioc4_dma_ops = { + .dma_host_set = sgiioc4_dma_host_set, + .dma_setup = sgiioc4_dma_setup, + .dma_start = sgiioc4_dma_start, + .dma_end = sgiioc4_dma_end, + .dma_test_irq = sgiioc4_dma_test_irq, + .dma_lost_irq = sgiioc4_dma_lost_irq, + .dma_timeout = ide_dma_timeout, +}; + static const struct ide_port_info sgiioc4_port_info __devinitdata = { .chipset = ide_pci, .init_dma = ide_dma_sgiioc4, .port_ops = &sgiioc4_port_ops, + .dma_ops = &sgiioc4_dma_ops, .host_flags = IDE_HFLAG_NO_AUTOTUNE, .mwdma_mask = ATA_MWDMA2_ONLY, }; diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c index faf5c3d6ab72..1fffea3211bd 100644 --- a/drivers/ide/pci/siimage.c +++ b/drivers/ide/pci/siimage.c @@ -301,7 +301,7 @@ static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed) } /* returns 1 if dma irq issued, 0 otherwise */ -static int siimage_io_ide_dma_test_irq (ide_drive_t *drive) +static int siimage_io_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); struct pci_dev *dev = to_pci_dev(hwif->dev); @@ -320,14 +320,14 @@ static int siimage_io_ide_dma_test_irq (ide_drive_t *drive) } /** - * siimage_mmio_ide_dma_test_irq - check we caused an IRQ + * siimage_mmio_dma_test_irq - check we caused an IRQ * @drive: drive we are testing * * Check if we caused an IDE DMA interrupt. We may also have caused * SATA status interrupts, if so we clean them up and continue. */ - -static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) + +static int siimage_mmio_dma_test_irq(ide_drive_t *drive) { ide_hwif_t *hwif = HWIF(drive); unsigned long addr = siimage_selreg(hwif, 0x1); @@ -369,6 +369,14 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive) return 0; } +static int siimage_dma_test_irq(ide_drive_t *drive) +{ + if (drive->hwif->mmio) + return siimage_mmio_dma_test_irq(drive); + else + return siimage_io_dma_test_irq(drive); +} + /** * sil_sata_reset_poll - wait for SATA reset * @drive: drive we are resetting @@ -756,41 +764,6 @@ static u8 __devinit sil_cable_detect(ide_hwif_t *hwif) return (ata66 & 0x01) ? ATA_CBL_PATA80 : ATA_CBL_PATA40; } -/** - * init_hwif_siimage - set up hwif structs - * @hwif: interface to set up - * - * We do the basic set up of the interface structure. The SIIMAGE - * requires several custom handlers so we override the default - * ide DMA handlers appropriately - */ - -static void __devinit init_hwif_siimage(ide_hwif_t *hwif) -{ - u8 sata = is_sata(hwif); - - if (sata) { - static int first = 1; - - if (first) { - printk(KERN_INFO "siimage: For full SATA support you should use the libata sata_sil module.\n"); - first = 0; - } - } - - if (hwif->dma_base == 0) - return; - - if (sata) - hwif->host_flags |= IDE_HFLAG_NO_ATAPI_DMA; - - if (hwif->mmio) { - hwif->ide_dma_test_irq = &siimage_mmio_ide_dma_test_irq; - } else { - hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq; - } -} - static const struct ide_port_ops sil_pata_port_ops = { .set_pio_mode = sil_set_pio_mode, .set_dma_mode = sil_set_dma_mode, @@ -809,13 +782,17 @@ static const struct ide_port_ops sil_sata_port_ops = { .cable_detect = sil_cable_detect, }; +static struct ide_dma_ops sil_dma_ops = { + .dma_test_irq = siimage_dma_test_irq, +}; + #define DECLARE_SII_DEV(name_str, p_ops) \ { \ .name = name_str, \ .init_chipset = init_chipset_siimage, \ .init_iops = init_iops_siimage, \ - .init_hwif = init_hwif_siimage, \ .port_ops = p_ops, \ + .dma_ops = &sil_dma_ops, \ .pio_mask = ATA_PIO4, \ .mwdma_mask = ATA_MWDMA2, \ .udma_mask = ATA_UDMA6, \ @@ -838,7 +815,24 @@ static const struct ide_port_info siimage_chipsets[] __devinitdata = { static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id) { - return ide_setup_pci_device(dev, &siimage_chipsets[id->driver_data]); + struct ide_port_info d; + u8 idx = id->driver_data; + + d = siimage_chipsets[idx]; + + if (idx) { + static int first = 1; + + if (first) { + printk(KERN_INFO "siimage: For full SATA support you " + "should use the libata sata_sil module.\n"); + first = 0; + } + + d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; + } + + return ide_setup_pci_device(dev, &d); } static const struct pci_device_id siimage_pci_tbl[] = { diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c index c2127cbdecd3..635d607bc0cf 100644 --- a/drivers/ide/pci/sl82c105.c +++ b/drivers/ide/pci/sl82c105.c @@ -282,34 +282,25 @@ static unsigned int __devinit init_chipset_sl82c105(struct pci_dev *dev, const c return dev->irq; } -/* - * Initialise IDE channel - */ -static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif) -{ - DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); - - if (!hwif->dma_base) - return; - - hwif->dma_lost_irq = &sl82c105_dma_lost_irq; - hwif->dma_start = &sl82c105_dma_start; - hwif->ide_dma_end = &sl82c105_dma_end; - hwif->dma_timeout = &sl82c105_dma_timeout; -} - static const struct ide_port_ops sl82c105_port_ops = { .set_pio_mode = sl82c105_set_pio_mode, .set_dma_mode = sl82c105_set_dma_mode, .resetproc = sl82c105_resetproc, }; +static struct ide_dma_ops sl82c105_dma_ops = { + .dma_start = sl82c105_dma_start, + .dma_end = sl82c105_dma_end, + .dma_lost_irq = sl82c105_dma_lost_irq, + .dma_timeout = sl82c105_dma_timeout, +}; + static const struct ide_port_info sl82c105_chipset __devinitdata = { .name = "W82C105", .init_chipset = init_chipset_sl82c105, - .init_hwif = init_hwif_sl82c105, .enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}}, .port_ops = &sl82c105_port_ops, + .dma_ops = &sl82c105_dma_ops, .host_flags = IDE_HFLAG_IO_32BIT | IDE_HFLAG_UNMASK_IRQS | /* FIXME: check for Compatibility mode in generic IDE PCI code */ @@ -334,7 +325,7 @@ static int __devinit sl82c105_init_one(struct pci_dev *dev, const struct pci_dev */ printk(KERN_INFO "W82C105_IDE: Winbond W83C553 bridge " "revision %d, BM-DMA disabled\n", rev); - d.init_hwif = NULL; + d.dma_ops = NULL; d.mwdma_mask = 0; d.host_flags &= ~IDE_HFLAG_SERIALIZE_DMA; } diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c index 14ce400a0eaf..4ce240db3263 100644 --- a/drivers/ide/pci/tc86c001.c +++ b/drivers/ide/pci/tc86c001.c @@ -168,8 +168,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif) /* Sector Count Register limit */ hwif->rqsize = 0xffff; - - hwif->dma_start = &tc86c001_dma_start; } static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev, @@ -188,11 +186,16 @@ static const struct ide_port_ops tc86c001_port_ops = { .cable_detect = tc86c001_cable_detect, }; +static struct ide_dma_ops tc86c001_dma_ops = { + .dma_start = tc86c001_dma_start, +}; + static const struct ide_port_info tc86c001_chipset __devinitdata = { .name = "TC86C001", .init_chipset = init_chipset_tc86c001, .init_hwif = init_hwif_tc86c001, .port_ops = &tc86c001_port_ops, + .dma_ops = &tc86c001_dma_ops, .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD | IDE_HFLAG_ABUSE_SET_DMA_MODE, .pio_mask = ATA_PIO4, diff --git a/drivers/ide/pci/trm290.c b/drivers/ide/pci/trm290.c index 7e354d33323b..c506e97cd716 100644 --- a/drivers/ide/pci/trm290.c +++ b/drivers/ide/pci/trm290.c @@ -214,7 +214,7 @@ static void trm290_dma_start(ide_drive_t *drive) { } -static int trm290_ide_dma_end (ide_drive_t *drive) +static int trm290_dma_end(ide_drive_t *drive) { u16 status; @@ -225,7 +225,7 @@ static int trm290_ide_dma_end (ide_drive_t *drive) return status != 0x00ff; } -static int trm290_ide_dma_test_irq (ide_drive_t *drive) +static int trm290_dma_test_irq(ide_drive_t *drive) { u16 status; @@ -280,12 +280,6 @@ static void __devinit init_hwif_trm290(ide_hwif_t *hwif) /* sharing IRQ with mate */ hwif->irq = hwif->mate->irq; - hwif->dma_host_set = &trm290_dma_host_set; - hwif->dma_setup = &trm290_dma_setup; - hwif->dma_exec_cmd = &trm290_dma_exec_cmd; - hwif->dma_start = &trm290_dma_start; - hwif->ide_dma_end = &trm290_ide_dma_end; - hwif->ide_dma_test_irq = &trm290_ide_dma_test_irq; #if 1 { /* @@ -319,11 +313,21 @@ static const struct ide_port_ops trm290_port_ops = { .selectproc = trm290_selectproc, }; +static struct ide_dma_ops trm290_dma_ops = { + .dma_host_set = trm290_dma_host_set, + .dma_setup = trm290_dma_setup, + .dma_exec_cmd = trm290_dma_exec_cmd, + .dma_start = trm290_dma_start, + .dma_end = trm290_dma_end, + .dma_test_irq = trm290_dma_test_irq, +}; + static const struct ide_port_info trm290_chipset __devinitdata = { .name = "TRM290", .init_hwif = init_hwif_trm290, .chipset = ide_trm290, .port_ops = &trm290_port_ops, + .dma_ops = &trm290_dma_ops, .host_flags = IDE_HFLAG_NO_ATAPI_DMA | #if 0 /* play it safe for now */ IDE_HFLAG_TRUST_BIOS_FOR_DMA | |