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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-05-31 10:05:18 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2016-05-31 12:50:47 +0200 |
commit | 39ec9ace7afe3a35f78eb4beffd18ad34a1e0278 (patch) | |
tree | b40e10b3f70a0e5686e7b65955176f5ed2b235f4 /drivers/ide | |
parent | pinctrl: uniphier: support per-pin input enable for new SoCs (diff) | |
download | linux-39ec9ace7afe3a35f78eb4beffd18ad34a1e0278.tar.xz linux-39ec9ace7afe3a35f78eb4beffd18ad34a1e0278.zip |
pinctrl: uniphier: support pin configuration for dedicated pins
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/ide')
0 files changed, 0 insertions, 0 deletions