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authorJonathan Cameron <Jonathan.Cameron@huawei.com>2022-05-08 19:55:59 +0200
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2022-06-14 12:53:13 +0200
commit9c6c7eff7d4a53efd4d0818f8664259a1862665a (patch)
tree12994135bf2310ee77618a8aef328acb5ce24a8f /drivers/iio/adc/ad7949.c
parentiio: adc: ad7923: Fix alignment for DMA safety (diff)
downloadlinux-9c6c7eff7d4a53efd4d0818f8664259a1862665a.tar.xz
linux-9c6c7eff7d4a53efd4d0818f8664259a1862665a.zip
iio: adc: ad7949: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Note the fixes tag predates some changes to this line of code so automated application of this fix may fail. Fixes: 7f40e0614317 ("iio:adc:ad7949: Add AD7949 ADC driver family") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Charles-Antoine Couret <charles-antoine.couret@essensium.com> Acked-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20220508175712.647246-20-jic23@kernel.org
Diffstat (limited to '')
-rw-r--r--drivers/iio/adc/ad7949.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c
index 44bb5fde83de..ed4c1656ca75 100644
--- a/drivers/iio/adc/ad7949.c
+++ b/drivers/iio/adc/ad7949.c
@@ -86,7 +86,7 @@ struct ad7949_adc_chip {
u8 resolution;
u16 cfg;
unsigned int current_channel;
- u16 buffer ____cacheline_aligned;
+ u16 buffer __aligned(IIO_DMA_MINALIGN);
__be16 buf8b;
};