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| author | Marius Cristea <marius.cristea@microchip.com> | 2023-10-13 15:23:33 +0200 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-10-14 18:17:25 +0200 |
| commit | 349c1b49ffafd9f0e49153599efd5cd251ba60b1 (patch) | |
| tree | 8847426dc7970e13cd979c823cafbf4f6adc2f6f /drivers/iio/adc | |
| parent | dt-bindings: trivial-devices: add silabs,si7005 (diff) | |
| download | linux-349c1b49ffafd9f0e49153599efd5cd251ba60b1.tar.xz linux-349c1b49ffafd9f0e49153599efd5cd251ba60b1.zip | |
iio: adc: MCP3564: fix warn: unsigned '__x' is never less than zero.
The patch 33ec3e5fc1ea: "iio: adc: adding support for MCP3564 ADC"
leads to the following Smatch static checker warning:
smatch warnings:
drivers/iio/adc/mcp3564.c:1105 mcp3564_fill_scale_tbls() warn: unsigned '__x' is never less than zero.
vim +/__x +1105 drivers/iio/adc/mcp3564.c
1094
1095 static void mcp3564_fill_scale_tbls(struct mcp3564_state *adc)
1096 {
.....
1103 for (i = 0; i < MCP3564_MAX_PGA; i++) {
1104 ref = adc->vref_mv;
> 1105 tmp1 = shift_right((u64)ref * NANO, pow);
1106 div_u64_rem(tmp1, NANO, &tmp0);
1107
.....
1113 }
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202309280738.NWjVfVt4-lkp@intel.com/
Fixes: 33ec3e5fc1ea (iio: adc: adding support for MCP3564 ADC)
Signed-off-by: Marius Cristea <marius.cristea@microchip.com>
Link: https://lore.kernel.org/r/20231013132333.10582-1-marius.cristea@microchip.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc')
| -rw-r--r-- | drivers/iio/adc/mcp3564.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/adc/mcp3564.c b/drivers/iio/adc/mcp3564.c index 9ede1a5d5d7b..e3f1de5fcc5a 100644 --- a/drivers/iio/adc/mcp3564.c +++ b/drivers/iio/adc/mcp3564.c @@ -1102,7 +1102,7 @@ static void mcp3564_fill_scale_tbls(struct mcp3564_state *adc) for (i = 0; i < MCP3564_MAX_PGA; i++) { ref = adc->vref_mv; - tmp1 = shift_right((u64)ref * NANO, pow); + tmp1 = ((u64)ref * NANO) >> pow; div_u64_rem(tmp1, NANO, &tmp0); tmp1 = tmp1 * mcp3564_hwgain_frac[(2 * i) + 1]; |