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| author | Lars-Peter Clausen <lars@metafoo.de> | 2018-06-25 10:03:07 +0200 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2018-07-24 19:17:08 +0200 |
| commit | 5a4e33c1c53ae7d4425f7d94e60e4458a37b349e (patch) | |
| tree | 73ecb76f0d1a678199baeb14a73f1a9d83f9786c /drivers/iio/frequency/ad9523.c | |
| parent | iio: adc: meson-saradc: add support for the Meson8m2 SoCs (diff) | |
| download | linux-5a4e33c1c53ae7d4425f7d94e60e4458a37b349e.tar.xz linux-5a4e33c1c53ae7d4425f7d94e60e4458a37b349e.zip | |
iio: ad9523: Fix displayed phase
Fix the displayed phase for the ad9523 driver. Currently the most
significant decimal place is dropped and all other digits are shifted one
to the left. This is due to a multiplication by 10, which is not necessary,
so remove it.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Fixes: cd1678f9632 ("iio: frequency: New driver for AD9523 SPI Low Jitter Clock Generator")
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/frequency/ad9523.c')
| -rw-r--r-- | drivers/iio/frequency/ad9523.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iio/frequency/ad9523.c b/drivers/iio/frequency/ad9523.c index 48ea46a1bc38..37504739c277 100644 --- a/drivers/iio/frequency/ad9523.c +++ b/drivers/iio/frequency/ad9523.c @@ -653,7 +653,7 @@ static int ad9523_read_raw(struct iio_dev *indio_dev, code = (AD9523_CLK_DIST_DIV_PHASE_REV(ret) * 3141592) / AD9523_CLK_DIST_DIV_REV(ret); *val = code / 1000000; - *val2 = (code % 1000000) * 10; + *val2 = code % 1000000; return IIO_VAL_INT_PLUS_MICRO; default: return -EINVAL; |