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author | Alexey Kardashevskiy <aik@au1.ibm.com> | 2011-03-02 16:18:48 +0100 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-04-27 06:18:19 +0200 |
commit | efcac6589a277c10060e4be44b9455cf43838dc1 (patch) | |
tree | d2236c1e9385baff297f0652c5a22b74f6acb149 /drivers/infiniband/hw/cxgb4/t4.h | |
parent | powerpc/book3e: Flush IPROT protected TLB entries leftover by firmware (diff) | |
download | linux-efcac6589a277c10060e4be44b9455cf43838dc1.tar.xz linux-efcac6589a277c10060e4be44b9455cf43838dc1.zip |
powerpc: Per process DSCR + some fixes (try#4)
The DSCR (aka Data Stream Control Register) is supported on some
server PowerPC chips and allow some control over the prefetch
of data streams.
This patch allows the value to be specified per thread by emulating
the corresponding mfspr and mtspr instructions. Children of such
threads inherit the value. Other threads use a default value that
can be specified in sysfs - /sys/devices/system/cpu/dscr_default.
If a thread starts with non default value in the sysfs entry,
all children threads inherit this non default value even if
the sysfs value is changed later.
Signed-off-by: Alexey Kardashevskiy <aik@au1.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'drivers/infiniband/hw/cxgb4/t4.h')
0 files changed, 0 insertions, 0 deletions