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authorEaswar Hariharan <easwar.hariharan@intel.com>2017-02-08 14:26:14 +0100
committerDoug Ledford <dledford@redhat.com>2017-02-19 15:18:34 +0100
commit39e2afa8d042a53d855137d4c5a689a6f5492b39 (patch)
treebccf63e704c48cb76a506410d61e420d69f79b34 /drivers/infiniband/hw/hfi1/qp.c
parentIB/hfi1: Ensure read of producer s_head is correct (diff)
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IB/hfi1: Use static CTLE with Preset 6 for integrated HFIs
After extended testing, it was found that the previous PCIe Gen 3 recipe, which used adaptive CTLE with Preset 4, could cause an NMI/Surprise Link Down in about 1 in 100 to 1 in 1000 power cycles on some platforms. New EV data combined with extensive empirical data indicates that the new recipe should use static CTLE with Preset 6 for all integrated silicon SKUs. Fixes: c3f8de0b334c ("IB/hfi1: Add static PCIe Gen3 CTLE tuning") Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Easwar Hariharan <easwar.hariharan@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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