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| author | Will Deacon <will@kernel.org> | 2020-01-15 16:21:47 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-01-15 17:30:27 +0100 |
| commit | d71e01716b3606a6648df7e5646ae12c75babde4 (patch) | |
| tree | 6c36ad589a8008d4dd1dcca5570b4ef081a60c8a /drivers/iommu/arm-smmu-v3.c | |
| parent | iommu/arm-smmu-v3: Add second level of context descriptor table (diff) | |
| download | linux-d71e01716b3606a6648df7e5646ae12c75babde4.tar.xz linux-d71e01716b3606a6648df7e5646ae12c75babde4.zip | |
iommu/arm-smmu-v3: Use WRITE_ONCE() when changing validity of an STE
If, for some bizarre reason, the compiler decided to split up the write
of STE DWORD 0, we could end up making a partial structure valid.
Although this probably won't happen, follow the example of the
context-descriptor code and use WRITE_ONCE() to ensure atomicity of the
write.
Reported-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/arm-smmu-v3.c')
| -rw-r--r-- | drivers/iommu/arm-smmu-v3.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index c2d1325c9d39..3aa6538d85e2 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1873,7 +1873,8 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, STRTAB_STE_1_EATS_TRANS)); arm_smmu_sync_ste_for_sid(smmu, sid); - dst[0] = cpu_to_le64(val); + /* See comment in arm_smmu_write_ctx_desc() */ + WRITE_ONCE(dst[0], cpu_to_le64(val)); arm_smmu_sync_ste_for_sid(smmu, sid); /* It's likely that we'll want to use the new STE soon */ |