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| author | Lu Baolu <baolu.lu@linux.intel.com> | 2020-01-02 01:18:12 +0100 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2020-01-07 14:05:57 +0100 |
| commit | 10f8008f0f884c3f8b6c8ea8f0f84540beda86be (patch) | |
| tree | 72d6da9a01a0a57a10f90c6b92030eb0275e0c07 /drivers/iommu/intel-iommu.c | |
| parent | iommu/vt-d: trace: Extend map_sg trace event (diff) | |
| download | linux-10f8008f0f884c3f8b6c8ea8f0f84540beda86be.tar.xz linux-10f8008f0f884c3f8b6c8ea8f0f84540beda86be.zip | |
iommu/vt-d: Avoid iova flush queue in strict mode
If Intel IOMMU strict mode is enabled by users, it's unnecessary
to create the iova flush queue.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to '')
| -rw-r--r-- | drivers/iommu/intel-iommu.c | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index fb21a7745db2..4631b1796482 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -1858,10 +1858,12 @@ static int domain_init(struct dmar_domain *domain, struct intel_iommu *iommu, init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN); - err = init_iova_flush_queue(&domain->iovad, - iommu_flush_iova, iova_entry_free); - if (err) - return err; + if (!intel_iommu_strict) { + err = init_iova_flush_queue(&domain->iovad, + iommu_flush_iova, iova_entry_free); + if (err) + return err; + } domain_reserve_special_ranges(domain); @@ -5199,6 +5201,7 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) { struct dmar_domain *dmar_domain; struct iommu_domain *domain; + int ret; switch (type) { case IOMMU_DOMAIN_DMA: @@ -5215,11 +5218,14 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) return NULL; } - if (type == IOMMU_DOMAIN_DMA && - init_iova_flush_queue(&dmar_domain->iovad, - iommu_flush_iova, iova_entry_free)) { - pr_warn("iova flush queue initialization failed\n"); - intel_iommu_strict = 1; + if (!intel_iommu_strict && type == IOMMU_DOMAIN_DMA) { + ret = init_iova_flush_queue(&dmar_domain->iovad, + iommu_flush_iova, + iova_entry_free); + if (ret) { + pr_warn("iova flush queue initialization failed\n"); + intel_iommu_strict = 1; + } } domain_update_iommu_cap(dmar_domain); |