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authorBjorn Andersson <bjorn.andersson@linaro.org>2019-05-16 01:32:34 +0200
committerWill Deacon <will@kernel.org>2019-06-25 14:26:47 +0200
commit9e6ea59f3ff37192fd7aec7821dca6ece629b7d0 (patch)
treecafa2dcc9651a7b95f163a255e8a1beb7086c2cf /drivers/iommu/io-pgtable-arm-v7s.c
parentiommu/io-pgtable: Replace IO_PGTABLE_QUIRK_NO_DMA with specific flag (diff)
downloadlinux-9e6ea59f3ff37192fd7aec7821dca6ece629b7d0.tar.xz
linux-9e6ea59f3ff37192fd7aec7821dca6ece629b7d0.zip
iommu/io-pgtable: Support non-coherent page tables
Describe the memory related to page table walks as non-cacheable for iommu instances that are not DMA coherent. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> [will: Use cfg->coherent_walk, fix arm-v7s, ensure outer-shareable for NC] Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/io-pgtable-arm-v7s.c')
-rw-r--r--drivers/iommu/io-pgtable-arm-v7s.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/iommu/io-pgtable-arm-v7s.c b/drivers/iommu/io-pgtable-arm-v7s.c
index 8454de93e356..35de9ebb500c 100644
--- a/drivers/iommu/io-pgtable-arm-v7s.c
+++ b/drivers/iommu/io-pgtable-arm-v7s.c
@@ -789,8 +789,11 @@ static struct io_pgtable *arm_v7s_alloc_pgtable(struct io_pgtable_cfg *cfg,
/* TTBRs */
cfg->arm_v7s_cfg.ttbr[0] = virt_to_phys(data->pgd) |
ARM_V7S_TTBR_S | ARM_V7S_TTBR_NOS |
- ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBWA) |
- ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBWA);
+ (cfg->coherent_walk ?
+ (ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_WBWA) |
+ ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_WBWA)) :
+ (ARM_V7S_TTBR_IRGN_ATTR(ARM_V7S_RGN_NC) |
+ ARM_V7S_TTBR_ORGN_ATTR(ARM_V7S_RGN_NC)));
cfg->arm_v7s_cfg.ttbr[1] = 0;
return &data->iop;