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| author | Yong Wu <yong.wu@mediatek.com> | 2019-08-24 05:01:56 +0200 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2019-08-30 15:57:26 +0200 |
| commit | 2aa4c2597cd67139697eb3095d5b6d61074c7ffc (patch) | |
| tree | 806e28fd73772c5eafc004b5d1c84405e7c91193 /drivers/iommu/mtk_iommu.h | |
| parent | iommu/mediatek: Adjust the PA for the 4GB Mode (diff) | |
| download | linux-2aa4c2597cd67139697eb3095d5b6d61074c7ffc.tar.xz linux-2aa4c2597cd67139697eb3095d5b6d61074c7ffc.zip | |
iommu/mediatek: Add bclk can be supported optionally
In some SoCs, M4U doesn't have its "bclk", it will use the EMI
clock instead which has always been enabled when entering kernel.
Currently mt2712 and mt8173 have this bclk while mt8183 doesn't.
This also is a preparing patch for mt8183.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/mtk_iommu.h')
| -rw-r--r-- | drivers/iommu/mtk_iommu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index c281c01b2d5b..821172bd6c52 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -35,6 +35,9 @@ enum mtk_iommu_plat { struct mtk_iommu_plat_data { enum mtk_iommu_plat m4u_plat; bool has_4gb_mode; + + /* HW will use the EMI clock if there isn't the "bclk". */ + bool has_bclk; }; struct mtk_iommu_domain; |