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authorChao Hao <chao.hao@mediatek.com>2020-07-03 06:41:22 +0200
committerJoerg Roedel <jroedel@suse.de>2020-07-10 16:13:11 +0200
commitb053bc7183c86dc52e68e9891d269992e79a5251 (patch)
tree1665fff1adb34c4ade7d5361f10cfec75fd5415b /drivers/iommu/mtk_iommu.h
parentiommu/mediatek: Setting MISC_CTRL register (diff)
downloadlinux-b053bc7183c86dc52e68e9891d269992e79a5251.tar.xz
linux-b053bc7183c86dc52e68e9891d269992e79a5251.zip
iommu/mediatek: Move inv_sel_reg into the plat_data
For mt6779, MMU_INV_SEL register's offset is changed from 0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to use it. In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it before mt6779. Signed-off-by: Chao Hao <chao.hao@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Cc: Yong Wu <yong.wu@mediatek.com> Link: https://lore.kernel.org/r/20200703044127.27438-6-chao.hao@mediatek.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/mtk_iommu.h')
-rw-r--r--drivers/iommu/mtk_iommu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index 5225a9170aaa..cf53f5e80d22 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -40,6 +40,7 @@ enum mtk_iommu_plat {
struct mtk_iommu_plat_data {
enum mtk_iommu_plat m4u_plat;
u32 flags;
+ u32 inv_sel_reg;
unsigned char larbid_remap[MTK_LARB_NR_MAX];
};