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author | Christoph Hellwig <hch@lst.de> | 2018-07-26 16:27:00 +0200 |
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committer | Palmer Dabbelt <palmer@sifive.com> | 2018-08-13 17:31:32 +0200 |
commit | 8237f8bc4f6eb7e5ce2a19276079cfd3a7c6314a (patch) | |
tree | 68c054430cfba76983a2d0e3db12a7d563d72230 /drivers/irqchip/Makefile | |
parent | RISC-V: Add the directive for alignment of stvec's value (diff) | |
download | linux-8237f8bc4f6eb7e5ce2a19276079cfd3a7c6314a.tar.xz linux-8237f8bc4f6eb7e5ce2a19276079cfd3a7c6314a.zip |
irqchip: add a SiFive PLIC driver
Add a driver for the SiFive implementation of the RISC-V Platform Level
Interrupt Controller (PLIC). The PLIC connects global interrupt sources
to the local interrupt controller on each hart.
This driver is based on the driver in the RISC-V tree from Palmer Dabbelt,
but has been almost entirely rewritten since, and includes many fixes
from Atish Patra.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
[Binding update by Palmer]
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'drivers/irqchip/Makefile')
-rw-r--r-- | drivers/irqchip/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 15f268f646bf..fbd1ec8070ef 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -87,3 +87,4 @@ obj-$(CONFIG_MESON_IRQ_GPIO) += irq-meson-gpio.o obj-$(CONFIG_GOLDFISH_PIC) += irq-goldfish-pic.o obj-$(CONFIG_NDS32) += irq-ativic32.o obj-$(CONFIG_QCOM_PDC) += qcom-pdc.o +obj-$(CONFIG_SIFIVE_PLIC) += irq-sifive-plic.o |