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authorJon Hunter <jonathanh@nvidia.com>2016-05-10 17:14:37 +0200
committerMarc Zyngier <marc.zyngier@arm.com>2016-05-11 11:12:41 +0200
commita2a8fa5563d8740efaa8e62f653a6a85569c858b (patch)
tree5146b7c30a530938d9966e31b02a344517a47ae5 /drivers/irqchip/irq-crossbar.c
parentgenirq: Ensure IRQ descriptor is valid when setting-up the IRQ (diff)
downloadlinux-a2a8fa5563d8740efaa8e62f653a6a85569c858b.tar.xz
linux-a2a8fa5563d8740efaa8e62f653a6a85569c858b.zip
irqchip: Mask the non-type/sense bits when translating an IRQ
The firmware parameter that contains the IRQ sense bits may also contain other data. When return the IRQ type, bits outside of these sense bits should be masked. If these bits are not masked and irq_create_fwspec_mapping() is called to map an IRQ, then the comparison of the type returned from irq_domain_translate() will never match that returned by irq_get_trigger_type() (because this function masks the none sense bits) and so we will always call irq_set_irq_type() to program the type even if it was not really necessary. Currently, the downside to this is unnecessarily re-programmming the type but nevertheless this should be avoided. The Tegra LIC and TI Crossbar irqchips all have client instances (from reviewing the device-tree sources) where bits outside the IRQ sense bits are set, but do not mask these bits. Therefore, ensure these bits are masked for these irqchips. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-crossbar.c')
-rw-r--r--drivers/irqchip/irq-crossbar.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 75573fa431ba..1eef56a89b1f 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b/drivers/irqchip/irq-crossbar.c
@@ -183,7 +183,7 @@ static int crossbar_domain_translate(struct irq_domain *d,
return -EINVAL;
*hwirq = fwspec->param[1];
- *type = fwspec->param[2];
+ *type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
return 0;
}