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author | Mark Rutland <mark.rutland@arm.com> | 2024-06-17 13:18:39 +0200 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2024-06-24 19:16:44 +0200 |
commit | a6156e70316b322b61739468e465bfb1345b7ae2 (patch) | |
tree | ebeac9658dff5888f3b1a7042aaba5e95df68980 /drivers/irqchip/irq-gic-common.h | |
parent | irqchip/gic-common: Remove sync_access callback (diff) | |
download | linux-a6156e70316b322b61739468e465bfb1345b7ae2.tar.xz linux-a6156e70316b322b61739468e465bfb1345b7ae2.zip |
irqchip/gic-v3: Make distributor priorities variables
In subsequent patches the GICv3 driver will choose the regular interrupt
priority at boot time.
In preparation for using dynamic priorities, place the priorities in
variables and update the code to pass these as parameters. Users of
GICD_INT_DEF_PRI_X4 are modified to replicate the priority byte using
REPEAT_BYTE_U32().
There should be no functional change as a result of this patch.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Alexandru Elisei <alexandru.elisei@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Tested-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20240617111841.2529370-4-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/irqchip/irq-gic-common.h')
-rw-r--r-- | drivers/irqchip/irq-gic-common.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h index c230175dd584..e8eab72ef195 100644 --- a/drivers/irqchip/irq-gic-common.h +++ b/drivers/irqchip/irq-gic-common.h @@ -21,8 +21,8 @@ struct gic_quirk { int gic_configure_irq(unsigned int irq, unsigned int type, void __iomem *base); -void gic_dist_config(void __iomem *base, int gic_irqs); -void gic_cpu_config(void __iomem *base, int nr); +void gic_dist_config(void __iomem *base, int gic_irqs, u8 priority); +void gic_cpu_config(void __iomem *base, int nr, u8 priority); void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, void *data); void gic_enable_of_quirks(const struct device_node *np, |