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| author | Marc Zyngier <maz@kernel.org> | 2019-07-18 12:15:14 +0200 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2019-08-20 11:23:34 +0200 |
| commit | 1a60e1e6439164c06636dce5d32660de505d23c3 (patch) | |
| tree | b8c9ce3e84a73fa86addf761a3f087317fc2547d /drivers/irqchip/irq-gic-common.h | |
| parent | irqchip/gic-v3: Add ESPI range support (diff) | |
| download | linux-1a60e1e6439164c06636dce5d32660de505d23c3.tar.xz linux-1a60e1e6439164c06636dce5d32660de505d23c3.zip | |
irqchip/gic: Prepare for more than 16 PPIs
GICv3.1 allows up to 80 PPIs (16 legaci PPIs and 64 Extended PPIs),
meaning we can't just leave the old 16 hardcoded everywhere.
We also need to add the infrastructure to discover the number of PPIs
on a per redistributor basis, although we still pretend there is only
16 of them for now.
No functional change.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'drivers/irqchip/irq-gic-common.h')
| -rw-r--r-- | drivers/irqchip/irq-gic-common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-gic-common.h b/drivers/irqchip/irq-gic-common.h index 5a46b6b57750..ccba8b0fe0f5 100644 --- a/drivers/irqchip/irq-gic-common.h +++ b/drivers/irqchip/irq-gic-common.h @@ -22,7 +22,7 @@ int gic_configure_irq(unsigned int irq, unsigned int type, void __iomem *base, void (*sync_access)(void)); void gic_dist_config(void __iomem *base, int gic_irqs, void (*sync_access)(void)); -void gic_cpu_config(void __iomem *base, void (*sync_access)(void)); +void gic_cpu_config(void __iomem *base, int nr, void (*sync_access)(void)); void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, void *data); void gic_enable_of_quirks(const struct device_node *np, |