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| author | Marc Zyngier <marc.zyngier@arm.com> | 2018-05-27 17:39:55 +0200 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2018-07-16 15:22:19 +0200 |
| commit | 147c8f376e5526ebfaf2827734916414db52a3c4 (patch) | |
| tree | e119d83c2ae863e4e8277aad6f42e1111a104d49 /drivers/irqchip/irq-gic-v3-its-pci-msi.c | |
| parent | irqchip/gic-v3-its: Use full range of LPIs (diff) | |
| download | linux-147c8f376e5526ebfaf2827734916414db52a3c4.tar.xz linux-147c8f376e5526ebfaf2827734916414db52a3c4.zip | |
irqchip/gic-v3-its: Move minimum LPI requirements to individual busses
At the moment, the core ITS driver imposes the allocation to be
in chunks of 32. As we want to relax this on a per bus basis, let's
move the the the allocation constraints to each bus.
No functionnal change.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic-v3-its-pci-msi.c')
| -rw-r--r-- | drivers/irqchip/irq-gic-v3-its-pci-msi.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-gic-v3-its-pci-msi.c b/drivers/irqchip/irq-gic-v3-its-pci-msi.c index 25a98de5cfb2..75c3cafabc6a 100644 --- a/drivers/irqchip/irq-gic-v3-its-pci-msi.c +++ b/drivers/irqchip/irq-gic-v3-its-pci-msi.c @@ -86,8 +86,10 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev, /* ITS specific DeviceID, as the core ITS ignores dev. */ info->scratchpad[0].ul = pci_msi_domain_get_msi_rid(domain, pdev); - return msi_info->ops->msi_prepare(domain->parent, - dev, max(nvec, alias_count), info); + /* Allocate at least 32 MSIs, and always as a power of 2 */ + nvec = max(nvec, alias_count); + nvec = max_t(int, 32, roundup_pow_of_two(nvec)); + return msi_info->ops->msi_prepare(domain->parent, dev, nvec, info); } static struct msi_domain_ops its_pci_msi_ops = { |