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author | Julien Thierry <julien.thierry@arm.com> | 2019-06-11 11:38:08 +0200 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2019-06-21 16:49:30 +0200 |
commit | f57065782f245ca96f1472209a485073bbc11247 (patch) | |
tree | 7ef3589c0a854f8ed53dc077c442371b34dfd1cb /drivers/irqchip/irq-gic-v3.c | |
parent | arm64: irqflags: Pass flags as readonly operand to restore instruction (diff) | |
download | linux-f57065782f245ca96f1472209a485073bbc11247.tar.xz linux-f57065782f245ca96f1472209a485073bbc11247.zip |
arm64: irqflags: Add condition flags to inline asm clobber list
Some of the inline assembly instruction use the condition flags and need
to include "cc" in the clobber list.
Fixes: 4a503217ce37 ("arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking")
Cc: <stable@vger.kernel.org> # 5.1.x-
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic-v3.c')
0 files changed, 0 insertions, 0 deletions