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| author | Sudeep Holla <sudeep.holla@arm.com> | 2015-06-05 12:59:57 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2015-06-05 22:26:33 +0200 |
| commit | 55963c9f20d03124eefb4c365e1ca1f485fc3974 (patch) | |
| tree | 862b19e8115dc6cbec2176e33668c40acf246cc6 /drivers/irqchip/irq-gic.c | |
| parent | irqchip: renesas: intc-irqpin: Improve binding documentation (diff) | |
| download | linux-55963c9f20d03124eefb4c365e1ca1f485fc3974.tar.xz linux-55963c9f20d03124eefb4c365e1ca1f485fc3974.zip | |
irqchip: gic: Simplify gic_configure_irq by using IRQCHIP_SET_TYPE_MASKED
GIC requires to disable the interrupt before changing the trigger type.
irqchip core provides IRQCHIP_SET_TYPE_MASKED flag and ensures that the
interrupt is masked before calling chip.irq_set_type() if the irqchip
sets the flag.
This patch adds IRQCHIP_SET_TYPE_MASKED to GIC irqchip so that the core
can manage disabling the interrupt while changing the trigger type.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1433501997-19205-1-git-send-email-sudeep.holla@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/irqchip/irq-gic.c')
| -rw-r--r-- | drivers/irqchip/irq-gic.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 01999d74bd3a..8d7e1c8b6d56 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -324,6 +324,7 @@ static struct irq_chip gic_chip = { #endif .irq_get_irqchip_state = gic_irq_get_irqchip_state, .irq_set_irqchip_state = gic_irq_set_irqchip_state, + .flags = IRQCHIP_SET_TYPE_MASKED, }; void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) |