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authorMarc Zyngier <maz@kernel.org>2019-07-18 12:15:14 +0200
committerMarc Zyngier <maz@kernel.org>2019-08-20 11:23:34 +0200
commit1a60e1e6439164c06636dce5d32660de505d23c3 (patch)
treeb8c9ce3e84a73fa86addf761a3f087317fc2547d /drivers/irqchip/irq-hip04.c
parentirqchip/gic-v3: Add ESPI range support (diff)
downloadlinux-1a60e1e6439164c06636dce5d32660de505d23c3.tar.xz
linux-1a60e1e6439164c06636dce5d32660de505d23c3.zip
irqchip/gic: Prepare for more than 16 PPIs
GICv3.1 allows up to 80 PPIs (16 legaci PPIs and 64 Extended PPIs), meaning we can't just leave the old 16 hardcoded everywhere. We also need to add the infrastructure to discover the number of PPIs on a per redistributor basis, although we still pretend there is only 16 of them for now. No functional change. Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'drivers/irqchip/irq-hip04.c')
-rw-r--r--drivers/irqchip/irq-hip04.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-hip04.c b/drivers/irqchip/irq-hip04.c
index 1626131834a6..130caa1c9d93 100644
--- a/drivers/irqchip/irq-hip04.c
+++ b/drivers/irqchip/irq-hip04.c
@@ -273,7 +273,7 @@ static void hip04_irq_cpu_init(struct hip04_irq_data *intc)
if (i != cpu)
hip04_cpu_map[i] &= ~cpu_mask;
- gic_cpu_config(dist_base, NULL);
+ gic_cpu_config(dist_base, 32, NULL);
writel_relaxed(0xf0, base + GIC_CPU_PRIMASK);
writel_relaxed(1, base + GIC_CPU_CTRL);