summaryrefslogtreecommitdiffstats
path: root/drivers/irqchip/irq-imx-gpcv2.c
diff options
context:
space:
mode:
authorAndrey Smirnov <andrew.smirnov@gmail.com>2018-12-06 08:31:23 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2018-12-13 10:35:55 +0100
commitf2dace5f972576040477cc8a559254facebd3e10 (patch)
tree6d5929ae6c24bd1e548136716bde345354dc8741 /drivers/irqchip/irq-imx-gpcv2.c
parentirqchip/irq-imx-gpcv2: Share reg offset calculation code (diff)
downloadlinux-f2dace5f972576040477cc8a559254facebd3e10.tar.xz
linux-f2dace5f972576040477cc8a559254facebd3e10.zip
irqchip/irq-imx-gpcv2: Make use of BIT() macro
Convert all instances of 1 << x to BIT(x) for consistency with other kernel code. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: cphealy@gmail.com Cc: l.stach@pengutronix.de Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: "A.s. Dong" <aisheng.dong@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-imx-gpcv2.c')
-rw-r--r--drivers/irqchip/irq-imx-gpcv2.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c
index b262ba8b2652..077d56b3183a 100644
--- a/drivers/irqchip/irq-imx-gpcv2.c
+++ b/drivers/irqchip/irq-imx-gpcv2.c
@@ -78,7 +78,7 @@ static int imx_gpcv2_irq_set_wake(struct irq_data *d, unsigned int on)
u32 mask, val;
raw_spin_lock_irqsave(&cd->rlock, flags);
- mask = 1 << d->hwirq % 32;
+ mask = BIT(d->hwirq % 32);
val = cd->wakeup_sources[idx];
cd->wakeup_sources[idx] = on ? (val & ~mask) : (val | mask);
@@ -101,7 +101,7 @@ static void imx_gpcv2_irq_unmask(struct irq_data *d)
raw_spin_lock(&cd->rlock);
reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);
val = readl_relaxed(reg);
- val &= ~(1 << d->hwirq % 32);
+ val &= ~BIT(d->hwirq % 32);
writel_relaxed(val, reg);
raw_spin_unlock(&cd->rlock);
@@ -117,7 +117,7 @@ static void imx_gpcv2_irq_mask(struct irq_data *d)
raw_spin_lock(&cd->rlock);
reg = gpcv2_idx_to_reg(cd, d->hwirq / 32);
val = readl_relaxed(reg);
- val |= 1 << (d->hwirq % 32);
+ val |= BIT(d->hwirq % 32);
writel_relaxed(val, reg);
raw_spin_unlock(&cd->rlock);