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authorShanker Donthineni <shankerd@codeaurora.org>2017-01-26 04:51:41 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2017-02-08 14:41:28 +0100
commit2fd632a00383e812db7186f903ebed808d9951bd (patch)
tree96364ef96432891493ad06de64f603babd68eb86 /drivers/irqchip/irq-renesas-h8s.c
parentirqchip/qcom: Add IRQ combiner driver (diff)
downloadlinux-2fd632a00383e812db7186f903ebed808d9951bd.tar.xz
linux-2fd632a00383e812db7186f903ebed808d9951bd.zip
irqchip/gic-v3-its: Enable cacheable attribute Read-allocate hints
Read-allocation hints are not enabled for both the GIC-ITS and GICR tables. This forces the hardware to always read the table contents from an external memory (DDR) which is slow compared to cache memory. Most of the tables are often read by hardware. So, it's better to enable Read-allocate hints in addition to Write-allocate hints in order to improve the GICR_PEND, GICR_PROP, Collection, Device, and vCPU tables lookup time. Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-renesas-h8s.c')
0 files changed, 0 insertions, 0 deletions