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authorAnup Patel <anup@brainfault.org>2019-02-12 13:52:44 +0100
committerMarc Zyngier <marc.zyngier@arm.com>2019-02-21 11:32:12 +0100
commit3fecb5aac2888814884881317ef139437338d8d0 (patch)
tree90de15601e9eb1b36fbb147aab491f11016c8966 /drivers/irqchip/irq-sifive-plic.c
parentirqchip/sifive-plic: Pre-compute context hart base and enable base (diff)
downloadlinux-3fecb5aac2888814884881317ef139437338d8d0.tar.xz
linux-3fecb5aac2888814884881317ef139437338d8d0.zip
irqchip/sifive-plic: Add warning in plic_init() if handler already present
We have two enteries (one for M-mode and another for S-mode) in the interrupts-extended DT property of PLIC DT node for each HART. It is expected that firmware/bootloader will set M-mode HWIRQ line of each HART to 0xffffffff (i.e. -1) in interrupts-extended DT property because Linux runs in S-mode only. If firmware/bootloader is buggy then it will not correctly update interrupts-extended DT property which might result in a plic_handler configured twice. This patch adds a warning in plic_init() if a plic_handler is already marked present. This warning provides us a hint about incorrectly updated interrupts-extended DT property. Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-sifive-plic.c')
-rw-r--r--drivers/irqchip/irq-sifive-plic.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index 715ef7b3f42d..b8721b4f8b2f 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -234,6 +234,11 @@ static int __init plic_init(struct device_node *node,
}
handler = per_cpu_ptr(&plic_handlers, cpu);
+ if (handler->present) {
+ pr_warn("handler already present for context %d.\n", i);
+ continue;
+ }
+
handler->present = true;
handler->hart_base =
plic_regs + CONTEXT_BASE + i * CONTEXT_PER_HART;