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| author | Ludovic Barre <ludovic.barre@st.com> | 2017-11-06 18:03:35 +0100 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2017-11-07 12:44:35 +0100 |
| commit | 2ca6b9bcaad4a78af255be9e16b3f3062a6d7c32 (patch) | |
| tree | 01fb4b0c2ccd3a212bcccc980593c67f7f15a9da /drivers/irqchip/irq-stm32-exti.c | |
| parent | irqchip/stm32: Add stm32h7 support (diff) | |
| download | linux-2ca6b9bcaad4a78af255be9e16b3f3062a6d7c32.tar.xz linux-2ca6b9bcaad4a78af255be9e16b3f3062a6d7c32.zip | |
irqchip/stm32: Fix initial values
-After cold boot, imr default value depends on hardware configuration.
-After hot reboot the registers must be cleared to avoid residue.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-stm32-exti.c')
| -rw-r--r-- | drivers/irqchip/irq-stm32-exti.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index 8f409a95918f..477d0faf0ea2 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -258,7 +258,16 @@ __init stm32_exti_init(const struct stm32_exti_bank **stm32_exti_banks, writel_relaxed(~0UL, base + stm32_bank->rtsr_ofst); irqs_mask = readl_relaxed(base + stm32_bank->rtsr_ofst); nr_exti = fls(readl_relaxed(base + stm32_bank->rtsr_ofst)); + + /* + * This IP has no reset, so after hot reboot we should + * clear registers to avoid residue + */ + writel_relaxed(0, base + stm32_bank->imr_ofst); + writel_relaxed(0, base + stm32_bank->emr_ofst); writel_relaxed(0, base + stm32_bank->rtsr_ofst); + writel_relaxed(0, base + stm32_bank->ftsr_ofst); + writel_relaxed(~0UL, base + stm32_bank->pr_ofst); pr_info("%s: bank%d, External IRQs available:%#x\n", node->full_name, i, irqs_mask); |