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authorPedro H. Penna <pedrohenriquepenna@gmail.com>2017-06-30 13:33:56 +0200
committerMarc Zyngier <marc.zyngier@arm.com>2017-06-30 16:33:11 +0200
commitca38701935138a4aba7dd9e4daf21e13a4663f43 (patch)
tree3c5f0a29d9ebddb75e51ae86f075ed9d269d4945 /drivers/irqchip
parentirqchip/irq-mvebu-gicp: Allocate enough memory for spi_bitmap (diff)
downloadlinux-ca38701935138a4aba7dd9e4daf21e13a4663f43.tar.xz
linux-ca38701935138a4aba7dd9e4daf21e13a4663f43.zip
irqchip/or1k-pic: Fix interrupt acknowledgement
Usually, hardware implicitly acknowledges interrupts when reading them. However, if this is not the case, the IRQ gets fired over and over again in the current implementation. This patch uses the right mask acknowledge function to handle the aforementioned situation on or1k processors that interact with such kind of hardware. Acked-by: Stafford Horne <shorne@gmail.com> Signed-off-by: Pedro H. Penna <pedrohenriquepenna@gmail.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to '')
-rw-r--r--drivers/irqchip/irq-or1k-pic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-or1k-pic.c b/drivers/irqchip/irq-or1k-pic.c
index 6a9a3e79218b..dd9d5d12fea2 100644
--- a/drivers/irqchip/irq-or1k-pic.c
+++ b/drivers/irqchip/irq-or1k-pic.c
@@ -70,7 +70,7 @@ static struct or1k_pic_dev or1k_pic_level = {
.name = "or1k-PIC-level",
.irq_unmask = or1k_pic_unmask,
.irq_mask = or1k_pic_mask,
- .irq_mask_ack = or1k_pic_mask,
+ .irq_mask_ack = or1k_pic_mask_ack,
},
.handle = handle_level_irq,
.flags = IRQ_LEVEL | IRQ_NOPROBE,