diff options
author | Nishanth Menon <nm@ti.com> | 2014-06-26 09:10:21 +0200 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-06-30 21:11:18 +0200 |
commit | 64e0f8ba5cae74471f72e0cb218c67915e365f47 (patch) | |
tree | d37a9eefd697f98912cb697858054cd5d2ba092c /drivers/irqchip | |
parent | irqchip: crossbar: Check for premapped crossbar before allocating (diff) | |
download | linux-64e0f8ba5cae74471f72e0cb218c67915e365f47.tar.xz linux-64e0f8ba5cae74471f72e0cb218c67915e365f47.zip |
irqchip: crossbar: Introduce ti, irqs-skip to skip irqs that bypass crossbar
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Link: https://lkml.kernel.org/r/1403766634-18543-4-git-send-email-r.sricharan@ti.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-crossbar.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c index 51d4b878e5d6..0533a71fa86f 100644 --- a/drivers/irqchip/irq-crossbar.c +++ b/drivers/irqchip/irq-crossbar.c @@ -18,6 +18,7 @@ #define IRQ_FREE -1 #define IRQ_RESERVED -2 +#define IRQ_SKIP -3 #define GIC_IRQ_START 32 /* @@ -160,6 +161,25 @@ static int __init crossbar_of_init(struct device_node *node) } } + /* Skip irqs hardwired to bypass the crossbar */ + irqsr = of_get_property(node, "ti,irqs-skip", &size); + if (irqsr) { + size /= sizeof(__be32); + + for (i = 0; i < size; i++) { + of_property_read_u32_index(node, + "ti,irqs-skip", + i, &entry); + if (entry > max) { + pr_err("Invalid skip entry\n"); + ret = -EINVAL; + goto err3; + } + cb->irq_map[entry] = IRQ_SKIP; + } + } + + cb->register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL); if (!cb->register_offsets) goto err3; |