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authorTudor Ambarus <tudor.ambarus@microchip.com>2021-04-09 10:25:22 +0200
committerLinus Walleij <linus.walleij@linaro.org>2021-04-13 09:42:18 +0200
commitcbde6c823bfaa553fb162257a5926ba15ebaaa43 (patch)
treebd4d99da10ba646f13c1520709b794a752c2e3e0 /drivers/irqchip
parentpinctrl: samsung: use 'int' for register masks in Exynos (diff)
downloadlinux-cbde6c823bfaa553fb162257a5926ba15ebaaa43.tar.xz
linux-cbde6c823bfaa553fb162257a5926ba15ebaaa43.zip
pinctrl: at91-pio4: Fix slew rate disablement
The slew rate was enabled by default for each configuration of the pin. In case the pin had more than one configuration, even if we set the slew rate as disabled in the device tree, the next pin configuration would set again the slew rate enabled by default, overwriting the slew rate disablement. Instead of enabling the slew rate by default for each pin configuration, enable the slew rate by default just once per pin, regardless of the number of configurations. This way the slew rate disablement will also work for cases where pins have multiple configurations. Fixes: c709135e576b ("pinctrl: at91-pio4: add support for slew-rate") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Link: https://lore.kernel.org/r/20210409082522.625168-1-tudor.ambarus@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/irqchip')
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