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author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2012-07-06 03:33:26 +0200 |
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committer | Nicolas Pitre <nicolas.pitre@linaro.org> | 2013-07-30 15:02:16 +0200 |
commit | ed96762e3241f57aa812977cf1920d3ee0363f4d (patch) | |
tree | 18849feb3008c15c4affc370119821a4b1c72458 /drivers/irqchip | |
parent | ARM: bL_switcher: hot-unplug half of the available CPUs (diff) | |
download | linux-ed96762e3241f57aa812977cf1920d3ee0363f4d.tar.xz linux-ed96762e3241f57aa812977cf1920d3ee0363f4d.zip |
ARM: bL_switcher: do not hardcode GIC IDs in the code
Currently, GIC IDs are hardcoded making the code dependent on the 4+4 b.L
configuration. Let's allow for GIC IDs to be discovered upon switcher
initialization to support other b.L configurations such as the 1+1 one,
or 2+3 as on the VExpress TC2.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-gic.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 268874ac75e6..3862cb54c714 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -668,6 +668,27 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) #ifdef CONFIG_BL_SWITCHER /* + * gic_get_cpu_id - get the CPU interface ID for the specified CPU + * + * @cpu: the logical CPU number to get the GIC ID for. + * + * Return the CPU interface ID for the given logical CPU number, + * or -1 if the CPU number is too large or the interface ID is + * unknown (more than one bit set). + */ +int gic_get_cpu_id(unsigned int cpu) +{ + unsigned int cpu_bit; + + if (cpu >= NR_GIC_CPU_IF) + return -1; + cpu_bit = gic_cpu_map[cpu]; + if (cpu_bit & (cpu_bit - 1)) + return -1; + return __ffs(cpu_bit); +} + +/* * gic_migrate_target - migrate IRQs to another CPU interface * * @new_cpu_id: the CPU target ID to migrate IRQs to |