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| author | Kim, Milo <Milo.Kim@ti.com> | 2013-03-21 01:37:04 +0100 |
|---|---|---|
| committer | Bryan Wu <cooloney@gmail.com> | 2013-04-01 20:04:53 +0200 |
| commit | 81f2a5b4a0570a662efd629c176fc1d67e56f7e3 (patch) | |
| tree | 673895fad2c6e0baaecfa8ac74e3f28cb47062ef /drivers/leds/leds-lp5562.c | |
| parent | leds: lp55xx: use common clock framework when external clock is used (diff) | |
| download | linux-81f2a5b4a0570a662efd629c176fc1d67e56f7e3.tar.xz linux-81f2a5b4a0570a662efd629c176fc1d67e56f7e3.zip | |
leds: lp55xx: configure the clock detection
Now LP55xx provides automatic clock detection API, lp55xx_is_extclk_used().
The clock configuration can be done by the driver itself.
(a) Concept
The default value is set by each driver with clock selection.
The internal clock selection bit is updated in case that the external clock
is not detected or clock rate is not 32KHz.
(b) Change on LP55xx platform data
The clock configuration is done automatically, so no need to define
'update_config' in the platform side.
Correlated information are removed in the documentations and header.
(c) Definitions moved from header to driver files
CONFIG register values are moved each driver, LP5521 and LP5562.
Not necessary definitions are removed also.
Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
Diffstat (limited to 'drivers/leds/leds-lp5562.c')
| -rw-r--r-- | drivers/leds/leds-lp5562.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/leds/leds-lp5562.c b/drivers/leds/leds-lp5562.c index f8b927788c3a..513f2390ca2d 100644 --- a/drivers/leds/leds-lp5562.c +++ b/drivers/leds/leds-lp5562.c @@ -71,8 +71,10 @@ /* CONFIG Register 08h */ #define LP5562_REG_CONFIG 0x08 -#define LP5562_DEFAULT_CFG \ - (LP5562_PWM_HF | LP5562_PWRSAVE_EN | LP5562_CLK_INT) +#define LP5562_PWM_HF 0x40 +#define LP5562_PWRSAVE_EN 0x20 +#define LP5562_CLK_INT 0x01 /* Internal clock */ +#define LP5562_DEFAULT_CFG (LP5562_PWM_HF | LP5562_PWRSAVE_EN) /* RESET Register 0Dh */ #define LP5562_REG_RESET 0x0D @@ -280,7 +282,7 @@ static void lp5562_firmware_loaded(struct lp55xx_chip *chip) static int lp5562_post_init_device(struct lp55xx_chip *chip) { int ret; - u8 update_cfg = chip->pdata->update_config ? : LP5562_DEFAULT_CFG; + u8 cfg = LP5562_DEFAULT_CFG; /* Set all PWMs to direct control mode */ ret = lp55xx_write(chip, LP5562_REG_OP_MODE, LP5562_CMD_DIRECT); @@ -289,7 +291,11 @@ static int lp5562_post_init_device(struct lp55xx_chip *chip) lp5562_wait_opmode_done(); - ret = lp55xx_write(chip, LP5562_REG_CONFIG, update_cfg); + /* Update configuration for the clock setting */ + if (!lp55xx_is_extclk_used(chip)) + cfg |= LP5562_CLK_INT; + + ret = lp55xx_write(chip, LP5562_REG_CONFIG, cfg); if (ret) return ret; |