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| author | Heiko Stübner <heiko@sntech.de> | 2014-07-03 01:58:39 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-07-13 21:17:06 +0200 |
| commit | a245fecbb8064641d9cc317b347b5bdb2b7a4bb6 (patch) | |
| tree | d4573cc7258ecc18e9db839f809960062ee419b0 /drivers/lguest | |
| parent | clk: composite: improve rate_hw sanity check logic (diff) | |
| download | linux-a245fecbb8064641d9cc317b347b5bdb2b7a4bb6.tar.xz linux-a245fecbb8064641d9cc317b347b5bdb2b7a4bb6.zip | |
clk: rockchip: add basic infrastructure for clock branches
This adds infrastructure for registering clock branches. On Rockchip SoCs
most clock branches are a combination of mux,divider and gate components,
thus a composite clock is used when appropriate.
Clock branches are supposed to be declared in an array using the COMPOSITE*
or MUX, etc makros defined in the header and then registered using
rockchip_clk_register_branches.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/lguest')
0 files changed, 0 insertions, 0 deletions