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author | Kathiravan T <quic_kathirav@quicinc.com> | 2023-02-02 15:52:07 +0100 |
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committer | Jassi Brar <jaswinder.singh@linaro.org> | 2023-02-23 21:47:13 +0100 |
commit | 1261a6626a08071b7c9fa3025deb569c91eb55ae (patch) | |
tree | 0571e269138b87b465300973f9179a5251993f25 /drivers/mailbox | |
parent | dt-bindings: mailbox: qcom: add compatible for the IPQ5332 SoC (diff) | |
download | linux-1261a6626a08071b7c9fa3025deb569c91eb55ae.tar.xz linux-1261a6626a08071b7c9fa3025deb569c91eb55ae.zip |
mailbox: qcom-apcs-ipc: add IPQ5332 APSS clock support
IPQ5332 has the APSS clock controller utilizing the same register space
as the APCS, so provide access to the APSS utilizing a child device like
other IPQ chipsets.
Like IPQ6018, the same controller and driver is used, so utilize IPQ6018
match data for IPQ5332.
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'drivers/mailbox')
-rw-r--r-- | drivers/mailbox/qcom-apcs-ipc-mailbox.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index bd61dacb44ba..6bbf87c6d60b 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c @@ -141,6 +141,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev) /* .data is the offset of the ipc register within the global block */ static const struct of_device_id qcom_apcs_ipc_of_match[] = { + { .compatible = "qcom,ipq5332-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data }, |