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authorMauro Carvalho Chehab <mchehab@redhat.com>2012-01-20 23:13:07 +0100
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-01-21 16:46:35 +0100
commit6fb65a66a227013ba1825efcf47e3c5df1a39131 (patch)
tree887f0df97560137b7de41fb4843c6879ebd7bf33 /drivers/media/dvb/frontends/drxk.h
parent[media] az6007: Use DRX-K dynamic clock mode (diff)
downloadlinux-6fb65a66a227013ba1825efcf47e3c5df1a39131.tar.xz
linux-6fb65a66a227013ba1825efcf47e3c5df1a39131.zip
[media] drxk: add support for Mpeg output clock drive strength config
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/dvb/frontends/drxk.h')
-rw-r--r--drivers/media/dvb/frontends/drxk.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/media/dvb/frontends/drxk.h b/drivers/media/dvb/frontends/drxk.h
index 6b0fd2c5dcd6..ca921c77f71f 100644
--- a/drivers/media/dvb/frontends/drxk.h
+++ b/drivers/media/dvb/frontends/drxk.h
@@ -17,6 +17,7 @@
* @antenna_gpio: GPIO bit used to control the antenna
* @antenna_dvbt: GPIO bit for changing antenna to DVB-C. A value of 1
* means that 1=DVBC, 0 = DVBT. Zero means the opposite.
+ * @mpeg_out_clk_strength: DRXK Mpeg output clock drive strength.
* @microcode_name: Name of the firmware file with the microcode
*
* On the *_gpio vars, bit 0 is UIO-1, bit 1 is UIO-2 and bit 2 is
@@ -32,7 +33,8 @@ struct drxk_config {
bool antenna_dvbt;
u16 antenna_gpio;
- int chunk_size;
+ u8 mpeg_out_clk_strength;
+ int chunk_size;
const char *microcode_name;
};